With the development of COMPASS system, finding suitable and efficient multiplexing solutions have become important for the system signal design. In this paper, based on the alternative BOC (AltBOC) modulation technique, the multiplexing scheme for COMPASS Phase II B1 signals is proposed. Then, to combine all COMPASS Phase III (CP III) B1 components into a composite signal with constant envelope, the generalized majority voting (GMV) technique is employed based on the characteristics of CP III B1 signals. The proposed multiplexing schemes also provide potential opportunities for GNSS modernization and construction, such as GPS, Galileo, etc.

In this paper, an alternative transform based on the correlation of the residual block is proposed for the improvement of the H.264/AVC coding efficiency. A discrete sine transform is used alternately with a discrete cosine transform in order to greatly compact the energy of the signal when the correlation coefficients of the signal are in the range of -0.5 to 0.5. Therefore, the discrete sine transform is suggested to be used in conjunction with the discrete cosine transform in H.264/AVC. The alternative transform selecting the optimal transform between two transforms by using rate-distortion optimization shows a coding gain compared with H.264/AVC. The proposed method achieves a PSNR gain of up to 1.0 dB compared to JM 10.2 at relatively high bitrates.

Assistive technology (AT) is becoming increasingly important for improving the mobility and language learning capabilities of persons with disabilities, thus enabling them to function independently and to improve their social opportunities. The Morse code has been shown to be a valuable tool in assistive technology, augmentative and alternative communication, and rehabilitation for people with neuromuscular diseases such as amyotrophic lateral sclerosis, multiple sclerosis, and muscular dystrophy. In this paper, we designed and implemented a wireless environmental control aid system using the Morse code as an adapted access communication tool, which includes three types of switch: single-switch, double-switch, and six-switch types. People with disabilities can easily control all types of electronic appliance without restrictions owing to spatial arrangements using a signal transmission based on radio frequency (RF). Experimental results revealed that three participants with disabilities were able to gain access to electronic facilities after six weeks of practice with the new system.

The alternative c-means algorithm has recently been presented by Wu and Yang for robust clustering of data. In this letter, we analyze the convergence of this algorithm by transforming it into an equivalent form with the Legendre transform. It is shown that this algorithm converges to a local optimal solution from any starting point.

In this paper, we present a novel algorithm to the alternative wiring problem by analyzing the implication relationship between nodes of alternative wires. Alternative wiring, or rewiring, refers to the process of adding a redundant connection to a circuit so as to make a target connection redundant and removable from the circuit without altering the functionality of the circuit. The well-known ATPG-based alternative wiring scheme, Redundancy Addition and Removal for Multi-level Boolean Optimization (RAMBO), has shown its effectiveness in solving the problem in the last decade. But, the deficiency of RAMBO lies in its long execution time for redundancy identification among a large set of candidate alternative wires. Our approaches of redundancy identification by source node and destination node implication relationship indicate that a large subset of unnecessary redundancy check processes can be further avoided to improve the efficiency significantly. We propose an algorithm, the Implication Based Alternative Wiring Logic Transformation (IBAW), to integrate the two adroit techniques. IBAW provides a competent solution to the alternative wiring problem and shows an outstanding efficiency in our experiments. Experiments were performed on MCNC benchmark circuits. Results show that IBAW runs 6.8 times faster than the original RAMBO in locating alternative wires and solution quality is maintained.

In this paper, we consider a flexible method for designing n-entities communication protocols and services. The proposed technique considers alternative and parallel composition of n service specifications and n protocol specifications, where n 2. The specifications are specified in Basic LOTOS which is a Formal Description Technique (FDT). We use the weak bisimulation equivalence () to represent the correctness properties between the service specification and the protocol specification.

DANSE (Dynamically Adaptive Networking Service Environment) is a new architecture for adaptive network service systems. In this paper, a framework for context-aware service construction based on DANSE architecture is presented. In DANSE, any hardware, software, information, and services that are available on a network are treated as network resources. DANSE coordinates the construction of an end user's service based on the user's requests and situation or context (i.e., user's location, schedule, co-workers, etc.). To provide users with satisfactory services, it monitors user context continuously and searches for network resources that are convenient for a target user. Moreover, it detects changes in user context and invokes service construction if needed. If the desired service is not available, alternative services are automatically constructed. With those capabilities, DANSE enables ubiquitous provision of services any time, anywhere.

The single wire replacement attempts to replace a target wire by another wire without changing the circuit functionality. Due to the large searching space required, there is very little success in directly extending the single wire replacement technique to replace multiple wires at the same time. The objective in this paper is to propose a new logic transformation, called the alternative node (Alnode) technique, which attempts to replace multiple wires at a time. Basically, the transformation simultaneously replaces multiple input wires of a gate by a new set of input wires. To accomplish the transformation, we propose several speedup theorems for replacing multiple wires. In this paper, we also demonstrate that the Alnode technique can be applied to achieve power reduction for domino logic and wire length minimization in layouts. The experimental results are encouraging.

The complexity of designing communication protocols has lead researchers to develop various techniques for designing and verifying protocols. One of the most important techniques is a compositional technique. Using a compositional technique, a large and complex protocol is designed and verified by composing small and simple protocols which are easy to handle, design and verify. Unlike the other compositional approaches, we propose compositional techniques for simultaneously composing service specifications and protocol specifications based on Formal Description Techniques (FDTs) called LOTOS. The proposed techniques consider alternative, sequential, interrupt and parallel composition of service specifications and protocol specifications. The composite service specification and the composite protocol specification preserve the original behaviour and the correctness properties of individual service specifications and protocol specifications. We use the weak bisimulation equivalence (), to represent the correctness properties between the service specification and the protocol specification. When a protocol specification is weak bisimulation equivalent to a service specification, the protocol satisfies all the logical properties of a communication protocol as well as provides the services that are specified in the service specification.

A bottleneck identification methodology is proposed for the performance-oriented design of shared-bus multiprocessors, which are composed of several major subsystems (e.g. off-chip cache, bus, memory, I/O). A subsystem with the longest access time per instruction is the one that limits processor performance and creates a bottleneck to the system. The methodology also facilitates further refined analysis on the access time of the bottleneck subsystem to help identify the causes of the bottleneck. Example performance model of a particular shared-bus multiprocessor architecture with separate address bus and data bus is developed to illustrate the key idea of the bottleneck identification methodology. Accessing conflicts in subsystems and DMA transfers are also considered in the model.

The subject is the horizontal coil's temperature rise in DY for high frequency by being unavoidable for the tendency of more information on display monitor equipments. Writers made the temperature-balance model from a point of view that this temperature rise is coming from the heat rise and the conductivity, and we expressed the temperature rise of DY by using amount of the heat rise and conductivity characteristics of each element. Also, we indicated the method to decide about the selection of the wire size of coils, the section area and deflection sensitivity, with regard to reducing the temperature rise. We confirmed the effect of the temperature rise reduction by about 9 on products, under the condition of 64 kHz horizontal frequency.