The low temperature deposition of AlN at 160 °C is examined by using trimethyl aluminum (TMA) and NH radicals from plasma excited Ar diluted ammonia. For the deposition, a plasma tube separated from the reaction chamber is used to introduce the neutral NH radicals on the growing surface without the direct impacts of high-speed species and UV photons, which might be effective in suppressing the plasma damage to the sample surfaces. To maximize the NH radical generation, the NH3 and Ar mixing ratio is optimized by plasma optical emission spectroscopy. To determine the saturated condition of TMA and NH radical irradiations, an in-situ surface observation of IR absorption spectroscopy (IRAS) with a multiple internal reflection geometry is utilized. The low temperature AlN deposition is performed with the TMA and NH radical exposures whose conditions are determined by the IRAS experiment. The spectroscopic ellipsometry indicates the all-round surface deposition in which the growth per cycles measured from front and backside surfaces of the Si sample are of the same range from 0.39∼0.41nm/cycle. It is confirmed that the deposited film contains impurities of C, O, N although we discuss the method to decrease them. X-ray diffraction suggests the AlN polycrystal deposition with crystal phases of AlN (100), (002) and (101). From the saturation curves of TMA adsorption and its nitridation, their chemical reactions are discussed in this paper. In the present paper, we discuss the possibility of the low temperature AlN deposition.

Nano crystalline zinc oxide (ZnO) is deposited by room temperature atomic layer deposition (RT-ALD) using dimethylzinc and a plasma excited humidified Ar without thermal treatments. The TEM observation indicated that the deposited ZnO films were crystallized with grain sizes of ∼20 nm on Si in the course of the RT-ALD process. The crystalline ZnO exhibited semiconducting characteristics in a thin film transistor, where the field-effect mobility was recorded at 1.29×10-3cm2/V·s. It is confirmed that the RT deposited ZnO film has an anticorrosion to hot water. The water vapor transmission rate of 8.4×10-3g·m-2·day-1 was measured from a 20 nm thick ZnO capped 40 nm thick Al2O3 on a polyethylene naphthalate film. In this paper, we discuss the crystallization of ZnO in the RT ALD process and its applicability to flexible electronics.

We studied the interaction of Bis-diethylaminosilane (SiH2[N(C2H5)2]2, BDEAS) with a hydroxylized Si (001) surface for SiO2 thin-film growth using density functional theory (DFT). BDEAS was adsorbed on the Si surface and reacted with the H atom of hydroxyl (-OH) to produce the di-ethylaminosilane (-SiH2[N(C2H5)2], DEAS) group and di-ethylamine (NH(C2H5)2, DEA). Then, DEAS was able to react with another H atom of -OH to produce DEA and to form the O-(SiH2)-O bond at the inter-dimer, inter-row, or intra-dimer site. Among the three different sites, the intra-dimer site was the most probable when it came to forming the O-(SiH2)-O bond.

A HfO2 as the charge-storage layer with the physical thickness thinner than 4 nm in silicon-oxide-high-k oxide-oxide-silicon (SOHOS) flash memory was investigated. Compared to the conventional silicon-oxide-nitride-oxide-silicon (SONOS) flash memory, the SOHOS shows the slow operational speed and exhibits the poorer retention characteristics. These are attributed to the thin physical thickness below 4 nm and the crystallization of the HfO2 to contribute the lateral migration of the trapped charge in the trapping layer during high temperature annealing process.

The process mapping of the ALD process of HfO2 using HfCl4 and H2O is reported. A thickness uniformity better than 3% was achieved over a 300 mm-wafer at a deposition rate of 0.52 Å/cycle. Usually, H2O purge period is set less than 10 sec to obtain reasonable throughput; however, the amounts of residual impurities (Cl, H) found to be in the order of sub%, and these impurities are piled up near the HfO2/Si interface. In order to reduce the piled up impurities, we proposed a 2-step deposition in which purge period for initial 10-20 cycles was set to be 90 sec and that for remaining cycles was usual value of 7.5 sec. The leakage current is reduced to 1/10 by using this 2-step deposition.