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  • A 10 bit 50 MS/s CMOS D/A Converter with 2.7 V Power Supply

    Takahiro MIKI  Yasuyuki NAKAMURA  Yoshikazu NISHIKAWA  Keisuke OKADA  Yasutaka HORIBA  

     
    PAPER

      Vol:
    E76-C No:5
      Page(s):
    738-745

    It has become an important subject to realize a high-speed D/A converter with low supply voltage. This paper discusses a 10 bit 50 MS/s CMOS D/A converter with 2.7 V power supply. Reduction of the supply voltage is achieved by developing "saturation-linear" biasing technique in current sources. In this scheme, a grounded transistor in cascode configuration is biased in linear region. High conversion rate is obtained by driving this grounded transistor directly. A charging transistor is also introduced into the current source for accelerating the settling time. The D/A converter is fabricated in a 1 µm CMOS process without using optional process steps. It successfully operates at 50 MS/s with 2.7 V power supply. The circuit techniques discussed here can be easily introduced into half-micron D/A converters.