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[Keyword] binary decision diagram (BDD)(8hit)

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  • A BDD-Based Approach to Finite-Time Control of Boolean Networks Open Access

    Fuma MOTOYAMA  Koichi KOBAYASHI  Yuh YAMASHITA  

     
    PAPER

      Pubricized:
    2023/10/23
      Vol:
    E107-A No:5
      Page(s):
    793-798

    Control of complex networks such as gene regulatory networks is one of the fundamental problems in control theory. A Boolean network (BN) is one of the mathematical models in complex networks, and represents the dynamic behavior by Boolean functions. In this paper, a solution method for the finite-time control problem of BNs is proposed using a BDD (binary decision diagram). In this problem, we find all combinations of the initial state and the control input sequence such that a certain control specification is satisfied. The use of BDDs enables us to solve this problem for BNs such that the conventional method cannot be applied. First, after the outline of BNs and BDDs is explained, the problem studied in this paper is given. Next, a solution method using BDDs is proposed. Finally, a numerical example on a 67-node BN is presented.

  • Hexagonal Binary Decision Diagram Quantum Circuit Approach for Ultra-Low Power III-V Quantum LSIs

    Hideki HASEGAWA  Seiya KASAI  Taketomo SATO  

     
    INVITED PAPER

      Vol:
    E87-C No:11
      Page(s):
    1757-1768

    A new approach for ultra-low-power LSIs based on quantum devices is presented and its present status and critical issues are discussed with a brief background review on the semiconductor nanotechnology. It is a hexagonal binary decision diagram (BDD) quantum logic circuit approach suitable for realization of ultra-low-power logic/memory circuits to be used in new applications such as intelligent quantum (IQ) chips embedded in the ubiquitous network environment. The basic concept of the approach, circuit examples showing its feasibility, growth of high density nanostructure networks by molecular beam epitaxy (MBE) for future LSI implementation, and the key processing issues including the device isolation issue are addressed.

  • Design of Decision Diagrams with Increased Functionality of Nodes through Group Theory

    Radomir S. STANKOVI  Jaakko ASTOLA  

     
    PAPER-VLSI Design Technology and CAD

      Vol:
    E86-A No:3
      Page(s):
    693-703

    This paper presents a group theoretic approach to the design of Decision diagrams (DDs) with increased functionality of nodes. Basic characteristics of DDs determine their applications, and thus, the optimization of DDs with respect to different characteristics is an important task. Increased functionality of nodes provides for optimization of DDs. In this paper, the methods for optimization of binary DDs by pairing of variables are interpreted as the optimization of DDs by changing the domain group for the represented functions. Then, it is pointed out that, for Abelian groups, the increased functionality of nodes by using larger subgroups may improve some of the characteristics of DDs at the price of other characteristics. With this motivation, we proposed the use of non-Abelian groups for the domain of represented functions by taking advantages from basic features of their group representations. At the same time, the present methods for optimization of DDs, do not offer any criterion or efficient algorithm to choose among a variety of possible different DDs for an assumed domain group. Therefore, we propose Fourier DDs on non-Abelian groups to exploit the reduced cardinality of the Fourier spectrum on these groups.

  • Heuristics to Minimize Multiple-Valued Decision Diagrams

    Hafiz Md. HASAN BABU  Tsutomu SASAO  

     
    PAPER-Logic Synthesis

      Vol:
    E83-A No:12
      Page(s):
    2498-2504

    In this paper, we propose a method to minimize multiple-valued decision diagrams (MDDs) for multiple-output functions. We consider the following: (1) a heuristic for encoding the 2-valued inputs; and (2) a heuristic for ordering the multiple-valued input variables based on sampling, where each sample is a group of outputs. We first generate a 4-valued input 2-valued multiple-output function from the given 2-valued input 2-valued functions. Then, we construct an MDD for each sample and find a good variable ordering. Finally, we generate a variable ordering from the orderings of MDDs representing the samples, and minimize the entire MDDs. Experimental results show that the proposed method is much faster, and for many benchmark functions, it produces MDDs with fewer nodes than sifting. Especially, the proposed method generates much smaller MDDs in a short time for benchmark functions when several 2-valued input variables are grouped to form multiple-valued variables.

  • Representations of Multiple-Output Functions Using Binary Decision Diagrams for Characteristic Functions

    Hafiz Md. HASAN BABU  Tsutomu SASAO  

     
    PAPER

      Vol:
    E82-A No:11
      Page(s):
    2398-2406

    This paper proposes a method to construct smaller binary decision diagrams for characteristic functions (BDDs for CFs). A BDD for CF represents an n-input m-output function, and evaluates all the outputs in O(n+m) time. We derive an upper bound on the number of nodes of the BDD for CF of n-bit adders (adrn). We also compare complexities of BDDs for CFs with those of shared binary decision diagrams (SBDDs) and multi-terminal binary decision diagrams (MTBDDs). Our experimental results show: 1) BDDs for CFs are usually much smaller than MTBDDs; 2) for adrn and for some benchmark circuits, BDDs for CFs are the smallest among the three types of BDDs; and 3) the proposed method often produces smaller BDDs for CFs than an existing method.

  • A Partially Explicit Method for Efficient Symbolic Checking of Language Containment

    Kiyoharu HAMAGUCHI  Michiyo ICHIHARA  Toshinobu KASHIWABARA  

     
    PAPER

      Vol:
    E82-A No:11
      Page(s):
    2455-2464

    There are two approaches for formal verification of sequential designs or finite state machines: language containment checking and symbolic model checking. To verify designs of practical size, in these two approaches, designs are represented symbolically, in practice, by ordered binary decision diagrams. In the conventional algorithm for language containment checking, finite automata given as specifications are also represented symbolically. This paper proposes a new method, called partially explicit method for checking language containment. By representing states of finite automata given as specifications explicitly, this method can remove redundant computations, and as a result, provide better performance than the conventional method which uses the product machines of designs and specifications. The experimental results show that this approach is effective in checking language containment symbolically.

  • Shared Multi-Terminal Binary Decision Diagrams for Multiple-Output Functions

    Hafiz Md. HASAN BABU  Tsutomu SASAO  

     
    PAPER-Logic Synthesis

      Vol:
    E81-A No:12
      Page(s):
    2545-2553

    This paper describes a method to represent m output functions using shared multi-terminal binary decision diagrams (SMTBDDs). The SMTBDD(k) consists of multi-terminal binary decision diagrams (MTBDDs), where each MTBDD represents k output functions. An SMTBDD(k) is the generalization of shared binary decision diagrams (SBDDs) and MTBDDs: for k=1, it is an SBDD, and for k=m, it is an MTBDD. The size of a BDD is the total number of nodes. The features of SMTBDD(k)s are: 1) they are often smaller than SBDDs or MTBDDs; and 2) they evaluate k outputs simultaneously. We also propose an algorithm for grouping output functions to reduce the size of SMTBDD(k)s. Experimental results show the compactness of SMTBDD(k)s. An SMTBDDmin denotes the smaller SMTBDD which is either an SMTBDD(2) or an SMTBDD(3) with fewer nodes. The average relative sizes for SBDDs, MTBDDs, and SMTBDDs are 1. 00, 152. 73, and 0. 80, respectively.

  • Implicit Representation and Manipulation of Binary Decision Diagrams

    Hitoshi YAMAUCHI  Nagisa ISHIURA  Hiromitsu TAKAHASHI  

     
    PAPER

      Vol:
    E79-A No:3
      Page(s):
    354-362

    This paper presents implicit representation of binary decision diagrams (implicit BDDs) as a new effecient data structure for Boolean functions. A well-known method of representing graphs by binary decision diagrams (BDDs) is applied to BDDs themselves. Namely, it is a BDD representation of BDDs. Regularity in the structure of BDDs representing certain Boolean functions contributes to significant reduction in size of the resulting implicit BDD repersentation. Since the implicit BDDs also provide canonical forms for Boolean functions, the equivalence of the two implicit BDD forms is decided in time proportional to the representation size. We also show an algorithm to maniqulate Boolean functions on this implicit data structure.