A fully integrated CMOS wideband Low Noise Amplifier (LNA) operating over 2.3-7 GHz is designed and fabricated using a 0.18 µm CMOS process. The proposed structure is a common source-common source (CS-CS) cascode amplifier with a coupling capacitor. It realizes both low voltage drop at load resistor (Rload) and high gain over 2.3-7 GHz with simultaneous noise and input matching and low power consumption. This paper presents the proposed design technique of a wideband LNA, and verifies its performance by simulation and measurement. This wideband LNA achieves an average gain (S21) of 16.5 (dB), an input return loss (S11) less than -8 dB, a noise figure (NF) of 3.4-6.7 dB, and a third order input interception point (IIP3) of -7.5-3 dBm at 2.3-7 GHz with power consumption of 10.8 mW under 1.8 V VDD.