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Min Gee KIM Masakazu KATAOKA Rengie Mark D. MAILIG Shun-ichiro OHMI
Ferroelectric gate field-effect transistors (MFSFETs) were investigated utilizing nondoped HfO2 deposited by RF magnetron sputtering utilizing Hf target. After the post-metallization annealing (PMA) process with Pt top gate at 500°C/30s, ferroelectric characteristic of 10nm thick nondoped HfO2 was obtained. The fabricated MFSFETs showed the memory window of 1.7V when the voltage sweep range was from -3 to 3V.
Dongsu KIM James Stevenson KENNEY
This paper investigates intermodultation distortion in ferroelectric phase shifters depending on bias voltage. Two analog phase shifters based on barium-strontium-titantate (BST) coated sapphire substrates have been fabricated with interdigital capacitors (IDCs) which have 2 and 4 µm spacing between adjacent fingers. In case of the phase shifter with 4 µm-spaced IDCs, a phase shift of more than 121was obtained with a maximum insertion loss of 1.8 dB from 2.4 to 2.5 GHz over a bias voltage range of 0-140 V. The phase shifter with 2 µm-spaced IDCs exhibited a phase shift of more than 135with a maximum insertion loss of 2.37 dB in the same frequency range. In this case, a bias voltage of 80 V was used. Using 2 and 4 µm-spaced phase shifters, a third-order intermodulation (IM3) measurement was carried out with a two-tone cancellation setup to investigate nonlinearity, resulting in an input third-order intercept point (IIP3) of about 30.5 dBm and 38.5 dBm, respectively.
Yeonbae CHUNG Jung-Hyun KIM Jae-Eun YOON
This paper proposes a new FeRAM design style based on grounded-plate PMOS-gate (GPPG) cell structure. A GPPG cell consists of a PMOS access transistor and a ferroelectric capacitor. Its plate is grounded. The proposed scheme employs three novel operating methods: 1) VDD precharged bitline, 2) negative-voltage wordline technique and 3) negative-pulse restore. Because this configuration doesn't need the on-pitch plate control circuitry, it is effective in realizing cost-effective chip sizes. Implementation of a 2.5-V, 2-Mb FeRAM prototype design in a 0.5-µm technology shows a cell array efficiency of 57%, an access time of 85 ns and an active current of 12 mA, respectively.
Dongsu KIM Yoonsu CHOI Minsik AHN Mark G. ALLEN J. Stevenson KENNEY
The design, fabrication, and characterization of monolithic analog phase shifters based on barium-strontium-titanate (BST) coated sapphire substrates with continuously variable 180and 360phase-shift ranges are presented. The phase shifter using a single series resonated termination can provide 180phase shift with the chip area of 4 mm 4 mm. A double series resonated termination in a parallel connection can reach over 370phase shift with better than 6.8 dB-loss at 2.4 GHz. Also, an all-pass network phase shifter composed of only lumped LC elements was described here. This phase shifter demonstrated 160phase shift with an insertion loss of 3.1 dB 1 dB and return loss of better than 10 dB at 2.4 GHz. The total size of the phase shifter is only 2.4 mm 2.6 mm, which is the smallest reported BST phase shifter operating at S-band, to the best of the authors' knowledge.
Hitoshi TABATA Takeshi YANAGITA Tomoji KAWAI
We have constructed Bi based layer structured ferroelectric films and their superlattices by a pulsed laser deposition technique. The dielectric constants along c-axis increase with increasing of the number of pseudo-perovskite layers between double Bi2O2 layers. Ferroelectricity appears along the c-axis direction only for the odd number of the perovskite layers owing to the mirror symmetry in a crystal structure. Especially, the Bi2VO5. 5 film shows an atomically flat surface, low dielectric constant of 30 and ferroelectricity of Pr=3 µC/cm2 and Ec=16 kV/cm, respectively. This material is expected to the application for FRAMs.
A review of fundamental and practical limitations on ferroelectric thin-film non-volatile random access memories is given. Size effects are considered (both thickness and lateral dimensions) from the point of view of both depolarization field instabilities and electrical breakdown mechanisms. Emphasis is on switched-capacitor pass-gate architectures, but true ferroelectric FETs (in which the metal gate in the field-effect transistor is replaced with a ferroelectric film) are discussed briefly. The conclusion is that ferroelectric non-volatile RAMs of Gigabit densities are technically viable in the immediate future.
We have constructed a new concept device with combination of ferroelectric and ferromagnetic materials by a laser ablation technique. An ideal hetero-epitaxy can be obtained owing to the similar crystal structure of perovskite type ferroelectric Pb (Zr, Ti) O3; (so called PZT) and ferromagnetic (La, Sr) MnO3. The ferromagnetic (La, Sr) MnO3 compounds are well known for their colossal magnetoresistance (CMR) properties. The CMR effect is strongly affected by the lattice stress. The PZT, on the other hand, is famous for its large piezoelectrics. We can introduce the lattice stress easily by applying voltage for the piezoelectric compounds. In the heterostructured ferromagnetic/ferroelectric devices, there are remarkable interesting phenomena. Electric properties of the ferromagnetic material can be controlled by piezoelectric effect via distortion of crystal structure.
Ikuo SUZUKI Minoru MURAKAMI Masaki MAEDA
Chaotic behavior in a series resonance circuit with a ferroelectric triglycine sulfate (TGS) crystal was observed just below the ferroelectric phase transition temperature. We have analyzed the nonlinear responses by applying external electric fields to the crystal. The computer simulation was made for the modified forroelectric hysteresis loops to realize the experimental results. The fractal correlation dimension was determined to be ν=1.8 in the chaotic phase.