In this paper we present an on-chip noise detection circuit. In contrast with the previous works concerning on-chip noise measurement, this detector does not assume specific noise properties such as periodicity. The detector is able to continuously capture 10 nano-second time window from the measured signal with a resolution equal to 100 pico-second. The requested bandwidth of the output channel can be adjusted freely, therefore, the user can avoid the effect of on-chip parasites and the need to off-chip sophisticated monitoring tools. The detector is equipped with an on-chip programmable voltage divider, which enables measuring the high and low swing fluctuations accurately. Therefore, the detector is suitable to measure the non-periodic/single event noise for the purpose of reliability evaluation and performance modeling. The detector is implemented in a test chip using Hitachi 0.18 µm technology.

A high performance, high-swing CMOS cascode current mirror operating with 1V power supply voltage and using standard CMOS technology is presented. The present circuit employs PMOS source-coupled pair as voltage level shifter to reduce the power supply voltage requirement. The additional advantages of the use of the source-coupled pair are the improved output resistance and the automatic adaptive biasing, thereby enabling the high-swing of output terminal, when used in the cascode configuration. An analytical discussion of the circuit is carried out and the results are confirmed by SPICE simulation. SPICE simulation results show that the input voltage requirement is 370mV and the minimum output voltage requirement is 273mV at the maximum input current of 40µA, whose requirements decrease with decreasing input currens. The output resistance is shown to be greater than 4MΩ at the maximum output current of 40µA, which increases with decreasing output currents. The -3dB bandwidth is shown to be greater than 400MHz and the total harmonic distortion better than -54.34dB at 100kHz at the maximum peak-to-peak input current swing of 40µA. The present circuit will be useful for the low voltage, low power, high-performance mixed analog/digital signal processing.