Irregular LDPC codes can achieve better error rate performance than regular LDPC codes. However, irregular LDPC codes have higher error floors than regular LDPC codes. The Ordered Statistic Decoding (OSD) algorithm achieves approximate Maximum Likelihood (ML) decoding. ML decoding is effective to lower error floors. However, the OSD estimates satisfy the parity check equation of the LDPC code even the estimates are wrong. Hybrid decoder combining LLR-BP decoding algorithm and the OSD algorithm cannot also lower error floors, because wrong estimates also satisfy the LDPC parity check equation. We proposed the concatenated code constructed with an inner irregular LDPC code and an outer Cyclic Redundancy Check (CRC). Owing to CRC, we can detect wrong codewords from OSD estimates. Our CRC-LDPC code with hybrid decoder can lower error floors in an AWGN channel. In wireless communications, we cannot neglect the effects of the channel. The OSD algorithm needs the ordering of each bit based on the reliability. The Channel State Information (CSI) is used for deciding reliability of each bit. In this paper, we evaluate the Block Error Rate (BLER) of the CRC-LDPC code with hybrid decoder in a fast fading channel with perfect and imperfect CSIs where 'imperfect CSI' means that the distribution of channel and those statistical average of the fading amplitudes are known at the receiver. By computer simulation, we show that the CRC-LDPC code with hybrid decoder can lower error floors than the conventional LDPC code with hybrid decoder in the fast fading channel with perfect and imperfect CSIs. We also show that combining error detection with the OSD algorithm is effective not only for lowering the error floor but also for reducing computational complexity of the OSD algorithm.

Two versions of Krylov subspace order reduction techniques for VLSI interconnect reductions, including structure preserving reductions approach and adjoint networks approach, will be comparatively investigated. Also, we will propose a modified structure preserving reduction algorithm to speed up the projection construction in a linear order. The numerical experiment shows the high accuracy and low computational consumption of the modified method. In addition, it will be shown that the projection subspace generated from the structure-preserving approach and those from the adjoint networks approach are equivalent. Therefore, transfer functions of both reduced networks are identical.

This paper examines a system which is inspected at equally spaced points in time. We express the observed states of the system as a discrete time Markov chain with an absorbing state. It is assumed that the true state is certainly identified through inspection. After each inspection, one of three actions can be taken: Operation, repair, or replacement. We assume that the result of repair is uncertain. If repair is taken, we decide whether to inspect the system or not. When inspection is performed after completion of repair, we select an optimal action. After replacement, the system becomes new. We study the optimal maintenance policy which minimizes the expected total discounted cost for unbounded horizon. It is shown that, under reasonable conditions on the system's deterioration and repair laws and the cost structures, a control limit policy is optimal. We derive several valid properties for finding the optimal maintenance policy numerically. Furthermore, numerical analysis is conducted to show our theoretical results could hold under weaker conditions.

We present a novel algorithm that can suppress impulsive noise in video colour sequences. It uses order statistics, and directional and adaptive processing techniques.

We present theoretical foundations about error estimations of the global Krylov subspace techniques for multiple-inputs multiple-outputs (MIMO) Interconnect reductions. Analytical relationships between Lyapunov functions of the original interconnect network and those of the reduced system generated by the global Arnoldi algorithm will be developed. Under this framework, a new moment matching reduced network is proposed. Also, we will show that the reduced system can be expressed as the original network with some additive perturbations.

This paper proposes a new countermeasure, Random Switching Logic (RSL), against DPA (Differential Power Analysis) and Second-Order DPA at the logic level. RSL makes a signal transition uniform at each gate and suppresses the propagation of glitch to allow power consumption to be independent of predictable data. Furthermore, we implement basic logic circuits on the FPGA (Field Programmable Gate Array) by using RSL, and evaluate the effectiveness. As a result, we confirm the fact that the secure circuit can be structured against DPA and Second-Order DPA.

A second order charge pump (SOCP) scheme is proposed in this letter. Compared with the conventional single charge pump, the second order charge pump does not suffer phase errors caused by the output voltage dependent current mismatches. Also, the second order charge pump can be implemented in a mixed-mode type, enabling the fast lock and the various operation modes simultaneously. The proposed SOCP has been adopted into the duty cycle corrector (DCC) loops of DDR2 DRAM, and shows a much widened correction range owing to the removal of the parasitic effects.

In this paper, we propose new models for directly evaluating DPA leakage from logic information in CMOS circuits. These models are based on the transition probability for each gate, and are naturally applicable to various actual devices for simulating power analysis. Furthermore, we demonstrate the weakness of previously known hardware countermeasures for both our model and FPGA and suggest secure conditions for the hardware countermeasure.

This paper proposes novel calculuses of linearizing attack that can be applied to higher order differential attack. Higher order differential attack is a powerful and versatile attack on block ciphers. It can be roughly summarized as follows: (1) Derive an attack equation to estimate the key by using the higher order differential properties of the target cipher, (2) Determine the key by solving an attack equation. Linearizing attack is an effective method of solving attack equations. It linearizes an attack equation and determines the key by solving a system of linearized equations using approaches such as the Gauss-Jordan method. We enhance the derivation algorithm of the coefficient matrix for linearizing attack to reduce computational cost (fast calculus 1). Furthermore, we eliminate most of the unknown variables in the linearized equations by making the coefficient column vectors 0 (fast calculus 2). We apply these algorithms to an attack of the five-round variant of KASUMI and show that the attack complexity is equivalent to 228.9 chosen plaintexts and 231.2 KASUMI encryptions.

Despite the extensive literature on current conveyor-based voltage-mode first-order all-pass filters, no filter circuits have been reported to date that simultaneously achieve all of the advantageous features: (i) the employment of only one current conveyor, (ii) the employment of only one grounded capacitor, (iii) the employment of only one resistor, (iv) no need to impose component choice conditions, and (v) low active and passive sensitivities. In this letter, we describe such a filter structure with all of the above features simultaneously present, without trade-offs. H-Spice simulation results using the TSMC025 process and 1.25 V supply voltages validate the theoretical predictions.

This paper presents an architecture and a synthesis method for compact numerical function generators (NFGs) for trigonometric, logarithmic, square root, reciprocal, and combinations of these functions. Our NFG partitions a given domain of the function into non-uniform segments using an LUT cascade, and approximates the given function by a quadratic polynomial for each segment. Thus, we can implement fast and compact NFGs for a wide range of functions. Experimental results show that: 1) our NFGs require, on average, only 4% of the memory needed by NFGs based on the linear approximation with non-uniform segmentation; 2) our NFG for 2x-1 requires only 22% of the memory needed by the NFG based on a 5th-order approximation with uniform segmentation; and 3) our NFGs achieve about 70% of the throughput of the existing table-based NFGs using only a few percent of the memory. Thus, our NFGs can be implemented with more compact FPGAs than needed for the existing NFGs. Our automatic synthesis system generates such compact NFGs quickly.

The rapidly increasing bandwidth requirements of IP traffic mean that networks based on optical technologies in conjunction with IP routing technologies will provide the backbone of the next generation Internet. One of the major issues is how to construct an optical-technology-based backbone network that offers the economical transport of large-scale IP/MPLS services while achieving reliable, robust network. The key to achieving this objective lies in multilayer coordination technologies using Multi-Layer Service Network [MLSN] Architecture, that we previously proposed [2]. One of the important aspects of MLSN architecture is ability to effectively use GMPLS network resources by IP/MPLS service networks. We propose extensions to previously proposed MLSN architecture. The proposed extensions to MLSN architecture are tailored to address "service virtualization and separation" of various service networks over GMPLS backbone. As a part of this extended MLSN architecture, we introduce novel concepts known as Logical Router (LR) and Virtual Router (VR) that would enable border router to be services domain router, so that it can connect multiple service networks such as L2VPN, L3VPN etc., over GMPLS backbone by offering service separation or virtualization. This service separation/isolation greatly enhances the reliability of next generation networks, as any failure on one service should be isolated from others. We evaluate our extended network architecture against requirements for the large scale network targeting at introducing such new technology to cope with vast traffic explosion and challenges in operation and service provision sophistication.

It is well known that the diversity gain attained by DCA (Dynamic Channel Allocation) is generally very high over OFDM (Orthogonal Frequency Division Multiplexing)-based broadband networks. This paper introduces a numerical approach for measuring the performance gain afforded by DCA. In the mathematical analysis, the property of order statistics is adopted to derive the upper bound of the expected throughput via the use of DCA. In the simulation, it was possible to achieve a gain of 5 dB by exploiting multi-user and spectral diversities when the number of users is 16 and the total number of subcarriers is 256.

This paper presents a methodology based on congruent transformation for distributed interconnects described by state-space time-delays system. The proposed approach is to obtain the passive reduced order of linear time-delays system. The unified formulations are used to satisfy the passive preservation. The details of the mathematical proof and a couple of validation examples are given in this paper.

We developed an olfactory display to blend 8 component odors at any composition. The solenoid valves controlled by an algorithm with delta sigma modulation showed the sufficient capability. Then, we developed a system for presenting a movie together with scents. We actually made a movie with scents and evaluated it using questionnaire survey. It was found that the scene with smell attracted the experimental subjects' attention and, moreover, the contrast of the pleasant smell with the offensive one emphasized their attention. Furthermore, we established several guidelines for producing movies with scents.

A new fast and reliable image objective quality evaluation technique is presented in this paper. The proposed method takes image structure into account and uses a low complexity homogeneity measure to evaluate the intensity uniformity of a local region based on high-pass operators. We experimented with monochrome images under different types of distortions. Experimental results indicate that the proposed method provides better consistency with the perceived image quality. It is suitable for real applications to control the processed image quality.

The global Lanczos algorithm for solving the RLCG interconnect circuits is presented in this paper. This algorithm is an extension of the standard Lanczos algorithm for multiple-inputs multiple-outputs (MIMO) systems. A new matrix Krylov subspace will be developed first. By employing the congruence transformation with the matrix Krylov subspace, the two-side oblique projection-based method can be used to construct a reduced-order system. It will be shown that the system moments are still matched. The error of the 2q-th order system moment will be derived analytically. Furthermore, two novel model-order reduction techniques called the multiple point global Lanczos (MPGL) method and the adaptive-order global Lanczos (AOGL) method which are both based on the multiple point moment matching are proposed. The frequency responses using the multiple point moment matching method have higher coherence to the original system than those using the single point expansion method. Finally, simulation results on frequency domain will illustrate the feasibility and the efficiency of the proposed methods.

In this paper, we propose to employ an extension to the natural gradient algorithm for robust Independent Component Analysis against outliers. The standard natural gradient algorithm does not exhibit this property since it employs nonrobust sample estimates for computing higher order moments. In order to overcome this drawback, we propose to use robust alternatives to higher order moments, which are comparatively less sensitive to outliers in the observed data. Some computer simulations are presented to show that the proposed method, as compared to the standard natural gradient algorithm, gives better performance in the presence of outlying data.

A novel first order voltage-mode non-inverting and inverting output of all-pass filter using an inverting type current conveyor (ICCII) is given. It is a first announced about a first-order voltage-mode non-inverting and inverting output of all-pass filter at the same configuration in the literature. The proposed circuit is verified using HSPICE simulation with attractive results.

The present letter deals with the blind equalization problem of a single-input single-output infinite impulse response (SISO-IIR) channel with additive Gaussian noise. To solve the problem, we propose a new criterion for maximizing constrainedly a fourth-order cumulant. The algorithms derived from the criterion have such a novel property that even if Gaussian noise is added to the output of the channel, an effective zero-forcing (ZF) equalizer can be obtained with as little influence of Gaussian noise as possible. To show the validity of the proposed criterion, some simulation results are presented.