A new information detection method has been proposed for a very fast and efficient search engine. This method is implemented on hardware system using FPGA. We take advantages of Content Addressable Memory (CAM) which has an ability of matching mode for designing the system. The CAM blocks have been designed using available memory blocks of the FPGA device to save access times of the whole system. The entire memory can return multi-match results concurrently. The system operates based on the CAMs for pattern matching, in a parallel manner, to output multiple addresses of multi-match results. Based on the parallel multi-match operations, the system can be applied for pattern matching with various required constraint conditions without using any search principles. The very fast multi-match results are achieved at 60 ns with the operation frequency 50 MHz. This increases the search performance of the information detection system which uses this method as the core system.

We propose a unique synchronous rectification method in the rectification circuit of a DC-DC converter. This paper describes a novel synchronous rectification circuit that uses a saturable current transformer. We explain operations of this circuit, and analyzed them in this work. In addition, we verified operations of this method applied in boost converter and demonstrated its effectiveness when two or more converters operate in parallel through simulations and experiments.

The hardware implementation of a proposed high dimensional discrete torus knot code was successfully realized on an ASIC chip. The code has been worked on for more than a decade since then at Aichi Prefectural University and Nagoya Institutes of Technology, both in Nagoya, Japan. The hardware operation showed the ability to correct the errors about five to ten times the burst length, compared to the conventional codes, as expected from the code configuration and theory. The result in random error correction was also excellent, especially at a severely degraded error rate range of one hundredth to one tenth, and also for high grade characteristic exceeding 10-6. The operation was quite stable at the worst bit error rate and realized a high speed up to 50 Mbps, since the coder-decoder configuration consisted merely of an assemblage of parity check code and hardware circuitry with no critical loop path. The hardware architecture has a unique configuration and is suitable for large scale ASIC design. The developed code can be utilized for wider applications such as mobile computing and qualified digital communications, since the code will be expected to work well in both degraded and high grade channel situations.

We have developed and operated a newly conceived multiprobe scanning force microscope (SFM) using microfabricated piezoelectric cantilevers. An array of piezoelectric microcantilevers with a piezoelectric ZnO layer on an SiO2 film makes it possible to build a multiprobe SFM system. Multiprobe SFMs are required for the application of SFM to the probe lithography and high density data storage. Each cantilever probe of multiprobe system should have a detector for sensing of its own deflection and an actuator for positioning of its tip. The piezoelectric cantilever can detect its own vibration amplitude by measuring the piezoelectric current, and it can also drive its tip by applying a voltage to the piezoelectric layer. Therefore, the piezoelectric cantilever is suitable for each cantilever of the array in the multiprobe SFM. We have verified the applicability of the piezoelectric cantilever to each lever of the array by characterizing the sensitivities of the deflection sensing and actuation. The ZnO piezoelectric cantilever with the length of 125 µm works as the z scanner with the sensitivity of 20 nm/V. We have also fabricated an experimental piezoelectric microcantilever array with ten cantilevers. We have constructed parallel operation SFM system with two cantilevers of the fabricated array and successfully obtained parallel images of 1 µm pitch grating in constant height mode.

In this paper, symbols and numerals in topographic maps are recognized by the multi-angled parallelism (MAP) matching method, and small dots and lines are extracted by the MAP operation method. These results are then combined to determine the value, position, and attributes of elevation marks. Also, we reconstruct three dimensional surfaces described by contours, which is difficult even for humans since the elevation symbols are sparse. In reconstruction of the surface, we define an energy function that enfores three constraints: smoothness, fit, and contour. This energy function is minimized by solving a large linear system of simultaneous equations. We describe experiments on 25,000:1 scale topographic maps of the Tsukuba area.