A practical method of measuring the contact resistance of a phosphorus-doped poly-Si plug formed on a lightly phosphorus-doped diffusion region in DRAM memory cells is described. Contact resistance was obtained electrically, using ordinary contact-chain test structures, by changing the measurement of the substrate bias. This separated the bias-dependent resistance of the lightly doped diffusion layer from the total resistance. The method was used experimentally to evaluate the feasibility of forming low-resistance contacts down to a diameter of 130 nm for giga-bit DRAMs. Electrical measurement showed that reducing the interface resistance between the poly-Si plug and the lightly doped diffusion layer was effective for forming low-resistance contacts, though a specific interface layer could not be detected by TEM observation.