Measuring Contact Resistance of a Poly-Silicon Plug on a Lightly Doped Single-Diffusion Region in DRAM Cells
Summary :
A practical method of measuring the contact resistance of a phosphorus-doped poly-Si plug formed on a lightly phosphorus-doped diffusion region in DRAM memory cells is described. Contact resistance was obtained electrically, using ordinary contact-chain test structures, by changing the measurement of the substrate bias. This separated the bias-dependent resistance of the lightly doped diffusion layer from the total resistance. The method was used experimentally to evaluate the feasibility of forming low-resistance contacts down to a diameter of 130 nm for giga-bit DRAMs. Electrical measurement showed that reducing the interface resistance between the poly-Si plug and the lightly doped diffusion layer was effective for forming low-resistance contacts, though a specific interface layer could not be detected by TEM observation.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E85-C No.5 pp.1146-1150
- Publication Date
- 2002/05/01
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- Special Section PAPER (Special Issue on Microelectronic Test Structures)
- Category
Authors
Keyword
Latest Issue
Copyrights notice of machine-translated contents
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Cite this
Copy
Naoki KASAI, Hiroki KOGA, Yoshihiro TAKAISHI, "Measuring Contact Resistance of a Poly-Silicon Plug on a Lightly Doped Single-Diffusion Region in DRAM Cells" in IEICE TRANSACTIONS on Electronics,
vol. E85-C, no. 5, pp. 1146-1150, May 2002, doi: .
Abstract: A practical method of measuring the contact resistance of a phosphorus-doped poly-Si plug formed on a lightly phosphorus-doped diffusion region in DRAM memory cells is described. Contact resistance was obtained electrically, using ordinary contact-chain test structures, by changing the measurement of the substrate bias. This separated the bias-dependent resistance of the lightly doped diffusion layer from the total resistance. The method was used experimentally to evaluate the feasibility of forming low-resistance contacts down to a diameter of 130 nm for giga-bit DRAMs. Electrical measurement showed that reducing the interface resistance between the poly-Si plug and the lightly doped diffusion layer was effective for forming low-resistance contacts, though a specific interface layer could not be detected by TEM observation.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e85-c_5_1146/_p
Copy
@ARTICLE{e85-c_5_1146,
author={Naoki KASAI, Hiroki KOGA, Yoshihiro TAKAISHI, },
journal={IEICE TRANSACTIONS on Electronics},
title={Measuring Contact Resistance of a Poly-Silicon Plug on a Lightly Doped Single-Diffusion Region in DRAM Cells},
year={2002},
volume={E85-C},
number={5},
pages={1146-1150},
abstract={A practical method of measuring the contact resistance of a phosphorus-doped poly-Si plug formed on a lightly phosphorus-doped diffusion region in DRAM memory cells is described. Contact resistance was obtained electrically, using ordinary contact-chain test structures, by changing the measurement of the substrate bias. This separated the bias-dependent resistance of the lightly doped diffusion layer from the total resistance. The method was used experimentally to evaluate the feasibility of forming low-resistance contacts down to a diameter of 130 nm for giga-bit DRAMs. Electrical measurement showed that reducing the interface resistance between the poly-Si plug and the lightly doped diffusion layer was effective for forming low-resistance contacts, though a specific interface layer could not be detected by TEM observation.},
keywords={},
doi={},
ISSN={},
month={May},}
Copy
TY - JOUR
TI - Measuring Contact Resistance of a Poly-Silicon Plug on a Lightly Doped Single-Diffusion Region in DRAM Cells
T2 - IEICE TRANSACTIONS on Electronics
SP - 1146
EP - 1150
AU - Naoki KASAI
AU - Hiroki KOGA
AU - Yoshihiro TAKAISHI
PY - 2002
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E85-C
IS - 5
JA - IEICE TRANSACTIONS on Electronics
Y1 - May 2002
AB - A practical method of measuring the contact resistance of a phosphorus-doped poly-Si plug formed on a lightly phosphorus-doped diffusion region in DRAM memory cells is described. Contact resistance was obtained electrically, using ordinary contact-chain test structures, by changing the measurement of the substrate bias. This separated the bias-dependent resistance of the lightly doped diffusion layer from the total resistance. The method was used experimentally to evaluate the feasibility of forming low-resistance contacts down to a diameter of 130 nm for giga-bit DRAMs. Electrical measurement showed that reducing the interface resistance between the poly-Si plug and the lightly doped diffusion layer was effective for forming low-resistance contacts, though a specific interface layer could not be detected by TEM observation.
ER -
English
