1-2hit |
Tetsunori WADA Norihiko KOTANI
Design concepts and backgrounds of a 3-dimensional semiconductor process simulator are presented. It is designed to become a basis of developing semiconductor process models. An input language is designed to realize flexibly controlling simulation sequence, and its interpreter program is designed to accept external software to be controlled and to be integrated into a system. To realize data-exchanges between the process simulator and other software, a self-describing data-file format is designed and related program libraries are developed. A C++ class for solving drift-diffusion type partial-differential-equation in a three-dimensional space is developed.
Masato FUJINAGO Tatsuya KUNIKIYO Tetsuya UCHIDA Eiji TSUKUDA Kenichiro SONODA Katsumi EIKYU Kiyoshi ISHIKAWA Tadashi NISHIMURA Satoru KAWAZU
We have developed a practical 3-D integrated process simulator (3-D MIPS) based on the orthogonal grid. 3-D MIPS has a 3-D topography simulator (3-D MULSS) and 3-D impurity simulator which simulates the processes of ion implantation, impurity diffusion and oxidation. In particular, its diffusion and segregation model is new and practical. It assumes the continuity of impurity concentration at the material boundary in order to coordinate with the topography simulator (3-D MULSS) with cells in which two or more kinds of materials exist. And then, we introduced a time-step control method using the Dufort-Frankel method of diffusion analysis for stable calculation, and a selective oxidation model to apply to more general structures than LOCOS structure. After that, the 3-D MIPS diffusion model is evaluated compared with experimental data. Finally, the 3-D MIPS is applied to 3-D simulations of the nMOS Tr. structure with LOCOS isolation, wiring interconnect and pn-junction capacitances, and DRAM storage node area.