This paper presents an architecture and a circuit design of readout address compression for a high-speed 3-D range-finding image sensor using the light-section method. We utilize a kind of variable-length code which is modified to suit the 3-D range-finder. The best compression rate by the proposed compression technique is 33.3%. The worst compression and the average compression rate is 56.4% and 42.4%, respectively, when we simulated the effectivity by using the example of measured sheet scans. We also show the measurement result of the fabricated image sensor with the address compression.

A high-speed 3-D camera has a future possibility of wide variety of application fields such as quick inspection of industrial components, observation of motion/destruction of a target object, and fast collision prevention. In this paper, a row-parallel position detector for a high-speed 3-D camera based on a light-section method is presented. In our row-parallel search method, the positions of activated pixels are quickly detected by a row-parallel search circuit in pixel and a row-parallel address acquisition of O(log N) cycles in N-pixel horizontal resolution. The architecture keeps high-speed position detection in high pixel resolution. We have designed and fabricated the prototype position sensor with a 12816 pixel array in 0.35 µm CMOS process. The measurement results show it achieves quick activated-position acquisition of 450 ns for "beyond-real-time" 3-D imaging and visual feedback. The high-speed position detection of the scanning sheet beam is demonstrated.