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[Keyword] small-signal(6hit)

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  • DC and RF Performance of AlN/GaN MOS-HEMTs

    Sanna TAKING  Douglas MACFARLANE  Ali Z. KHOKHAR  Amir M. DABIRAN  Edward WASIGE  

     
    PAPER

      Vol:
    E94-C No:5
      Page(s):
    835-841

    This paper reports the DC and RF characteristics of AlN/GaN MOS-HEMTs passivated with thin Al2O3 formed by thermal oxidation of evaporated aluminium. Extraction of the small-signal equivalent circuit is also described. Device fabrication involved wet etching of evaporated Al from the Ohmic contact regions prior to metal deposition. This approach yielded an average contact resistance of ∼0.76 Ω.mm extracted from transmission line method (TLM) characterisation. Fabricated two-finger AlN/GaN MOS-HEMTs with 0.2 µm gate length and 100 µm gate width showed good gate control of drain currents up to a gate bias of 3 V and achieved a maximum drain current, IDSmax of ∼1460 mA/mm. The peak extrinsic transconductance, Gmax, of the device was ∼303 mS/mm at VDS = 4 V. Current-gain cut-off frequency, fT, and maximum oscillation frequency, fMAX, of 50 GHz and 40 GHz, respectively, were extracted from S-parameter measurements. For longer gate length, LG = 0.5 µm, fT and fMAX were 20 GHz and 30 GHz, respectively. These results demonstrate the potential of AlN/GaN MOS-HEMTs for high power and high frequency applications.

  • A Design Procedure for CMOS Three-Stage NMC Amplifiers

    Mohammad YAVARI  

     
    PAPER

      Vol:
    E94-A No:2
      Page(s):
    639-645

    This paper presents a novel time-domain design procedure for fast-settling three-stage nested-Miller compensated (NMC) amplifiers. In the proposed design methodology, the amplifier is designed to settle within a definite time period with a given settling accuracy by optimizing both the power consumption and silicon die area. Detailed design equations are presented and the circuit level simulation results are provided to verify the usefulness of the proposed design procedure with respect to the previously reported design schemes.

  • Theoretical and Experimental Verification of Independent Control for Parallel-Connected Multi UPS

    Eduardo Kazuhide SATO  Atsuo KAWAMURA  

     
    PAPER-Rectifiers, Inverters and UPS

      Vol:
    E87-B No:12
      Page(s):
    3490-3499

    This paper proposes an independent control for parallel-connected multiple uninterruptible power supply (UPS) systems based upon a very simple control scheme. Here, the amplitude and phase angle of the output voltage are the controllable variables. With the only measurement of the output current, the active and reactive components are calculated to define the control variables. The entire system including the equations for the circuit, control and voltage limiters is well represented by a small-signal model, in which the computation of its eigenvalues constitutes the stability proof of the system. The root locus diagram gives an overall panorama of the system performance as a function of a certain gain and it aims to aid the further understanding and the design of the control. The experimental verification is carried out using a mere proportional-integral control scheme, which is a special case of the general control equation used in the theoretical analysis. For some situations, experiments show a flow of lateral current between UPS's, which causes an unbalanced current distribution. By increasing the proportional gain of the control equation for the output voltage amplitude, the lateral current can be substantially suppressed with a consequent improvement of the load sharing. Experimental results under various conditions show excellent results in terms of synchronization, load sharing and stability for three distinct output rating UPS's connected in parallel.

  • Analysis and Design of a Two-Loop Controlled Switching Power Amplifier

    Hisahito ENDO  Takashi YAMASHITA  Toshiyuki SUGIURA  

     
    PAPER-Power Supply

      Vol:
    E76-B No:9
      Page(s):
    1193-1201

    This paper analyses the amplification characteristics of a two-loop controlled switching power amplifier for a digital portable telephone and presents the amplifier which has a flat gain and small phase delay from dc to 100kHz. This amplifier is a modification of a switching regulator and it uses two-loop control to achieve a wideband amplification characteristic. Optimum amplification characteristics, however, can't be designed by using the conventional method for designing a switching regulator because a flat gain and small phase delay in an amplification characteristic has not been considered for most switching regulators. This paper analyses in detail the small-signal transfer functions of the switching power amplifier and shows the behaviour of zero and poles. It also shows the boundary condition of large-signal operation. A new design procedure of a switching power amplifier is presented, and the analytical results are verified by experiments.

  • A Precise Method for Determining AlGaAs/GaAs HBT Large-Signal Circuit Parameters Using Bias-Dependent Noise Parameters and Small-Signal S-Parameters

    Jun-ichi SHIMIZU  Nobuyuki HAYAMA  Kazuhiko HONJO  

     
    LETTER-Electronic Circuits

      Vol:
    E76-C No:1
      Page(s):
    159-162

    A precise method for determining AlGaAs/GaAs HBT large-signal circuit parameters is presented. In this method, the parameters are extracted from noise parameters and small-signal S-parameters measured under various bias conditions. The measured noise parameters are fitted to the calculated noise parameters derived from an approximation of Hawkins' equations applied to the macroscopic equivalent circuit. The small-signal S-parameters help to determine the large-signal circuit parameters. The derived large-signal parameters were used to design an HBT oscillator. The simulated results using these parameters were in good agreement with the fabricated device performance.

  • Computer-Aided Analysis of GaAs MESFETs with p-Buffer Layer on the Semi-Insulating Substrate

    Kazushige HORIO  Naohisa OKUMURA  

     
    PAPER

      Vol:
    E75-C No:10
      Page(s):
    1140-1145

    GaAs MESFETs with a p-buffer layer (or a buried p-layer) are important devices for high-speed GaAs ICs. To study what conditions are required as a good substrate for ICs, we have investigated, by two-dimensional simulation, small-signal parameters and drain-current transients of GaAs MESFETs with a p-buffer layer on the semi-insulating substrate. It is shown that the introduction of a p-buffer layer is effective to improve the transconductance and the cuttoff frequeycy. These parameters are not degrade even if the p-layer doping is increased and a neurtral p-region exists. It is also shown that drain-current drifts and hysteresis in I-V curves can occur in a case with a p-buffer layer, too. It is concluded that the introduction of a relatively highly-doped p-layer on a substrate with low acceptor and electron trap (EL2) densities is effective to realize the stable and high performance of GaAs MESFETs.