In this paper, we analyze the throughput and delay performances of the CDMA unslotted ALOHA system considering packet retransmisson. We also clarify the stability of the system. Based on these results, we propose the optimal retransmission control (ORC) to improve the performances. The ORC is the scheme to prevent the system from drifting to an undesirable operating point by controlling the birth rate of retransmitted packets. As a result, it is shown that the throughput and delay performances of the system with the ORC are better than without the ORC and the system does not drift to an undesirable operating point.

A new line simulator, SEMALIS has been developed. This simulator can handle complicated lot processings to maintain processing quality and efficient line operations to improve line performance. The current manufacturing line consists of five resource models: lot, process sequence, equipment, lot processing, and line operations. The parameters of these models are defined so as to accurately reflect the state of the line operations. From our simulation results, we confirmed that SEMALIS accurately identifies bottlenecks or starvations where equipment can be added or reduced to optimize equipment utilization through resource planning, and that SEMALIS can also be used to evaluate the long-term effects of line operating methods on the line performance of ASIC manufacturing lines.

A new transmit permission control scheme applicable in multi-cell communication systems is proposed. In this scheme, by prohibiting the transmissions from the users with relatively high propagation loss to their connecting hub stations, level of multiple access interference is decreased, and hence throughput characteristics are improved. Moreover, we continue our discussion to propose two adaptive forms of the transmit permission control scheme, in which the prohibition condition becomes more intelligent by considering the level of the offered traffic loads to hub stations. These methods are utilized in a slotted Aloha random transmission of the spread spectrum packets, and on the uplinks of a low earth orbit satellite communication system as an example of the multi-cell systems. It is shown that the adaptive schemes exhibits significantly improved characteristics at all offered traffic loads in these systems.

An analytical framework to study the nonuniformity in geographical distribution of the traffic load in low earth orbit satellite communication systems is presented. The model is then used to evaluate the throughput performance of the system with direct-sequence packet spread-slotted ALOHA multiple-access technique. As the result, it is shown that nonuniformity in traffic makes the characteristics of the system significantly different from the results of uniform traffic case and that the performance of each user varies according to its location. Moreover, the interference reached from users of adjacent satellites is shown to be one of the main factors that limit the performance of system.

The throughput performance of the non-persistent carrier sense spread spectrum with overload detection (NP-CSSS/OD) protocol is analysed and compared with that of the conventional non-persistent and one-persistent carrier sense multiple access with collision detection (NP-CSMA/CD and 1P-CSMA/CD) and the one-persistent carrier sense spread spectrum with overload detection (1P-CSSS/OD) protocols. We also introduced utilization measurements and did some performance comparisons between these protocols. At high offered loads, the NP-CSSS/OD protocol is found to offer the best throughput and utilization performances amongst them.

This paper studies the performance of a dialogue communication system which consists of two stations over a half-duplex line. When a station seizes the right to send its packets, it can consecutively transmits k packets. We analyze the transmission time of a message and the throughput performances of Stop-and-Wait, Go-back-N and Selective-Repeat protocols for the half-duplex line transmission system. Based on the analytical and numerical results, we clarify the influences of the switching and the thinking times, which exist in half-duplex line system, on the throughput performance, and give the optimal k which makes the throughput to become maximum. It is observed that the throughput performances are greatly influenced not only by the switching and thinking times but also by the average message length.

We consider a communication system in which a transmitter is connected to a receiver through parallel channels, and the Go-Back-N ARQ scheme is used to handle transmission errors. A packet error on one channel results in retransmission of packets assigned to other channels under the Go-Back-N ARQ scheme. Therefore, the channel-grouping (a grouped-channel is used to transmit the same packet at a time), would affect the throughput performance. We analyze the throughput performance, and give a tree-algorithm to efficiently search for the optimal channel-grouping which makes the throughput to become maximum. Numerical results show that the throughput is largely improved by using the optimal channel-grouping.

In this paper, we analyze the throughput of the Stop-and-wait and Go-back-N ARQ schemes over an unreliable channel modeled by the two-state Markov process. Generally, in these states, block error probabilities are different. From analytical results and numerical examples, we show that the throughput of the Stop-and-wait ARQ scheme only depends on overall average error probability, while that of the Go-back-N ARQ scheme depends on the characteristic of the Markov process.

Multiplication-accumulation is the basic computation required for image filtering operations. For real-time image filtering, very high throughput computation is essential. This work proposes a hardware algorithm for an application-specific VLSI architecture which realizes an area-efficient high throughput multiplier-accumulator. The proposed algorithm utilizes a priori knowledge of filter mask coefficients and optimizes number of basic hardware components (e.g., full adders, pipeline latches, etc.). This results in the minimum area VLSI architecture under certain input/output constraints.

In high-speed packet networks, protocol processing overhead time becomes remarkable in determining the system performance. In this paper, we present a new Selective-Repeat ARQ scheme (called Block SR-ARQ sheme), in which a packet is transmitted or retransmitted in the same way as basic SR-ARQ scheme, but a single acknowledgement packet is used to acknowledge a block of packets. The maximum number of packets acknowledged by an acknowledgement packet is defined as block size. We analyze the system throughput and the average packet delay over the system, and the accuracy of approximately analyzed results is validated by simulation. Furthermore, we show that there exists an optimal block size which obtains both the maximum throughput and the minimum average packet delay.

A model for time spread-pulse position modulation (TS-PPM)/code division multiple access (CDMA) systems is presented. A TS signal is produced by a TS-filter, whose characteristic is a pseudonoise sequence in frequency domain. The error probability performance is analyzed and compared with those of on-off keying (OOK) and binary phase shift keying (BPSK). It is shown that at the same transmission speed TS-PPM is superior to TS-OOK and TS-BPSK due to the dramatic decrease of multiple access interference. The throughput of the network is analyzed, and its relation to the length of pseudonoise sequence and the packet length is also discussed.

In this paper, a type hybrid ARQ scheme with Adaptive Forward Error Correction (ARQ/AFEC) using BCH codes is proposed and analyzed. The basic idea in the proposed type hybrid ARQ/AFEC scheme is to increase the error-correcting capability of BCH code according to channel state using incremental redundancy. The incremental redundancy is the remainder ai(x) of an information frame f(x) of length n divided by a minimum polynomial mi(x) of α2i-1, where α is a primitive element of finite field GF(2l). Let gi(x) be the product of mj(x) (j=1, 2, , i) and let ci(x) be the remainder of f(x) divided by gi(x). The polynomial ci(x) is obtained from the remainders ai(x) and ci-1(x) since mi(x)and gi-1 (x) are relatively prime. Since f(x) + ci(x) is divided by gi(x), f(x) + ci(x) is the codeword of an i-error-correcting BCH code when n2l-1. So, the errors less than or equal to i bits in f(x) can be corrected if ci(x) has no error.