Finding DC operating points of transistor circuits is a very important and difficult task. The Newton-Raphson method employed in SPICE-like simulators often fails to converge to a solution. To overcome this convergence problem, homotopy methods have been studied from various viewpoints. For efficiency of homotopy methods, it is important to construct an appropriate homotopy function. In conventional homotopy methods, linear auxiliary functions have been commonly used. In this paper, a homotopy method for solving transistor circuits using a nonlinear auxiliary function is proposed. The proposed method utilizes the nonlinear function closely related to circuit equations to be solved, so that it efficiently finds DC operating points of practical transistor circuits. Numerical examples show that the proposed method is several times more efficient than conventional three homotopy methods.

An efficient algorithm is proposed for finding all solutions of piecewise-linear resistive circuits containing bipolar transistors. This algorithm is based on a powerful test (termed the LP test) for nonexistence of a solution in a given region using linear programming (LP). In the LP test, an LP problem is formulated by surrounding the exponential functions in the Ebers-Moll model by right-angled triangles, and it is solved by LP, for example, by the simplex method. In this paper, it is shown that the LP test can be performed by the dual simplex method, which makes the number of pivotings much smaller. Effectiveness of the proposed technique is confirmed by numerical examples.

This paper presents an automatic synthesis method of active analog circuits that uses evolutionary search and employs some topological features of analog integrated circuits. Our system firstly generates a set of circuits at random, and then evolves their topologies and device sizing to fit an environment which is formed by the fitness function translated from the electrical specifications of the circuit. Therefore expert knowledge about circuit topologies and sizing are not needed. The capability of this method is demonstrated through experiments of automatic synthesis of CMOS operational amplifiers.

We show some results concerning the number of solutions of the equation y+Ax=b (yTx=0, y0, x0) which plays a central role in the dc analysis of transistor circuits. In particular, we give sufficient conditions for the equation to possess exactly 2l (ln) solutions, where n is the dimension of the vector x.

An efficient algorithm is proposed for finding all solutions of bipolar transistor circuits. This algorithm is based on a simple test that checks the nonexistence of a solution using linear programming. In this test, right-angled triangles are used for surrounding exponential functions of the Ebers-Moll model, by which the number of inequality constraints decreases and the test becomes efficient and powerful.

This letter describes the waveform relaxation algorithm with the dynamic circuit partitioning technique based on the operation point of bipolar devices. Finally, we verify its availability for the simulation of the digital bipolar transistor circuit.