IEICE TRANSACTIONS on Communications
Low Complexity Compensation of Frequency Dependent I/Q Imbalance and Carrier Frequency Offset for Direct Conversion Receivers
Summary :
Conventional algorithms for the joint estimation of carrier frequency offset (CFO) and I/Q imbalance no longer work when the I/Q imbalance depends on the frequency. In order to correct the imbalance across many frequencies, the compensator needed is a filter as opposed to a simple gain and phase compensator. Although, algorithms for estimating the optimal coefficients of this filter exist, their complexity is too high for hardware implementation. In this paper we present a new low complexity algorithm for joint estimation of CFO and frequency dependent I/Q imbalance. For the first part, we derive the estimation scheme using the linear least squares algorithm and examine its floating point performance compared to conventional algorithms. We show that the proposed algorithm can completely eliminate BER floor caused by CFO and I/Q imbalance at a lesser complexity compared to conventional algorithms. For the second part, we examine the hardware complexity in fixed point hardware and latency of the proposed algorithm. Based on BER performance, the circuit needs a wordlength of at least 16 bits in order to properly estimate CFO and I/Q imbalance. In this configuration, the circuit is able to achieve a maximum speed of 115.9 MHz in a Virtex 5 FPGA.
- Publication
- IEICE TRANSACTIONS on Communications Vol.E95-B No.2 pp.484-492
- Publication Date
- 2012/02/01
- Publicized
- Online ISSN
- 1745-1345
- DOI
- 10.1587/transcom.E95.B.484
- Type of Manuscript
- PAPER
- Category
- Wireless Communication Technologies
Authors
Keyword
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Leonardo LANANTE, Jr., Masayuki KUROSAKI, Hiroshi OCHI, "Low Complexity Compensation of Frequency Dependent I/Q Imbalance and Carrier Frequency Offset for Direct Conversion Receivers" in IEICE TRANSACTIONS on Communications,
vol. E95-B, no. 2, pp. 484-492, February 2012, doi: 10.1587/transcom.E95.B.484.
Abstract: Conventional algorithms for the joint estimation of carrier frequency offset (CFO) and I/Q imbalance no longer work when the I/Q imbalance depends on the frequency. In order to correct the imbalance across many frequencies, the compensator needed is a filter as opposed to a simple gain and phase compensator. Although, algorithms for estimating the optimal coefficients of this filter exist, their complexity is too high for hardware implementation. In this paper we present a new low complexity algorithm for joint estimation of CFO and frequency dependent I/Q imbalance. For the first part, we derive the estimation scheme using the linear least squares algorithm and examine its floating point performance compared to conventional algorithms. We show that the proposed algorithm can completely eliminate BER floor caused by CFO and I/Q imbalance at a lesser complexity compared to conventional algorithms. For the second part, we examine the hardware complexity in fixed point hardware and latency of the proposed algorithm. Based on BER performance, the circuit needs a wordlength of at least 16 bits in order to properly estimate CFO and I/Q imbalance. In this configuration, the circuit is able to achieve a maximum speed of 115.9 MHz in a Virtex 5 FPGA.
URL: https://global.ieice.org/en_transactions/communications/10.1587/transcom.E95.B.484/_p
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@ARTICLE{e95-b_2_484,
author={Leonardo LANANTE, Jr., Masayuki KUROSAKI, Hiroshi OCHI, },
journal={IEICE TRANSACTIONS on Communications},
title={Low Complexity Compensation of Frequency Dependent I/Q Imbalance and Carrier Frequency Offset for Direct Conversion Receivers},
year={2012},
volume={E95-B},
number={2},
pages={484-492},
abstract={Conventional algorithms for the joint estimation of carrier frequency offset (CFO) and I/Q imbalance no longer work when the I/Q imbalance depends on the frequency. In order to correct the imbalance across many frequencies, the compensator needed is a filter as opposed to a simple gain and phase compensator. Although, algorithms for estimating the optimal coefficients of this filter exist, their complexity is too high for hardware implementation. In this paper we present a new low complexity algorithm for joint estimation of CFO and frequency dependent I/Q imbalance. For the first part, we derive the estimation scheme using the linear least squares algorithm and examine its floating point performance compared to conventional algorithms. We show that the proposed algorithm can completely eliminate BER floor caused by CFO and I/Q imbalance at a lesser complexity compared to conventional algorithms. For the second part, we examine the hardware complexity in fixed point hardware and latency of the proposed algorithm. Based on BER performance, the circuit needs a wordlength of at least 16 bits in order to properly estimate CFO and I/Q imbalance. In this configuration, the circuit is able to achieve a maximum speed of 115.9 MHz in a Virtex 5 FPGA.},
keywords={},
doi={10.1587/transcom.E95.B.484},
ISSN={1745-1345},
month={February},}
Copy
TY - JOUR
TI - Low Complexity Compensation of Frequency Dependent I/Q Imbalance and Carrier Frequency Offset for Direct Conversion Receivers
T2 - IEICE TRANSACTIONS on Communications
SP - 484
EP - 492
AU - Leonardo LANANTE
AU - Jr.
AU - Masayuki KUROSAKI
AU - Hiroshi OCHI
PY - 2012
DO - 10.1587/transcom.E95.B.484
JO - IEICE TRANSACTIONS on Communications
SN - 1745-1345
VL - E95-B
IS - 2
JA - IEICE TRANSACTIONS on Communications
Y1 - February 2012
AB - Conventional algorithms for the joint estimation of carrier frequency offset (CFO) and I/Q imbalance no longer work when the I/Q imbalance depends on the frequency. In order to correct the imbalance across many frequencies, the compensator needed is a filter as opposed to a simple gain and phase compensator. Although, algorithms for estimating the optimal coefficients of this filter exist, their complexity is too high for hardware implementation. In this paper we present a new low complexity algorithm for joint estimation of CFO and frequency dependent I/Q imbalance. For the first part, we derive the estimation scheme using the linear least squares algorithm and examine its floating point performance compared to conventional algorithms. We show that the proposed algorithm can completely eliminate BER floor caused by CFO and I/Q imbalance at a lesser complexity compared to conventional algorithms. For the second part, we examine the hardware complexity in fixed point hardware and latency of the proposed algorithm. Based on BER performance, the circuit needs a wordlength of at least 16 bits in order to properly estimate CFO and I/Q imbalance. In this configuration, the circuit is able to achieve a maximum speed of 115.9 MHz in a Virtex 5 FPGA.
ER -
English
