True 50% Duty-Cycle SSH and SHH SiGe BiCMOS Divide-by-3 Prescalers

Sheng-Che TSENG; Chinchun MENG; Wei-Yu CHEN

doi:10.1093/ietele/e89-c.6.725

True 50% Duty-Cycle SSH and SHH SiGe BiCMOS Divide-by-3 Prescalers

Sheng-Che TSENG, Chinchun MENG, Wei-Yu CHEN

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Four 50% duty-cycle divide-by-3 prescalers--positively/ negatively triggered sample-sample-hold (SSH) and sample-hold-hold (SHH) prescalers--are designed based on the current switchable D flip-flops and discussed in this paper. The positively triggered SSH and SHH prescalers are fabricated using the 0.35-µm SiGe BiCMOS technology and measured by the real-time oscilloscope and the spectrum analyzer. The SHH prescaler is our proposed structure and demonstrated in this paper. According to the measurement results, under the condition of the same input power, its maximum operation frequency is twice as high as that of the SSH prescaler thanks to better signal synchronization. At 2.7 V supply, the SSH prescaler operates from 500 MHz to 2 GHz as the SHH prescaler performs from 1 GHz to 3.4 GHz. The input sensitivity level of both structures is about -5 dBm, while the maximum output power is also about -5 dBm. The core current consumption is 4.538 mA and 4.258 mA for the SSH and SHH prescalers, respectively.

Publication: IEICE TRANSACTIONS on Electronics Vol.E89-C No.6 pp.725-731

Publication Date: 2006/06/01

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Online ISSN: 1745-1353

DOI: 10.1093/ietele/e89-c.6.725

Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit and Device Technologies)

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Sheng-Che TSENG, Chinchun MENG, Wei-Yu CHEN, "True 50% Duty-Cycle SSH and SHH SiGe BiCMOS Divide-by-3 Prescalers" in IEICE TRANSACTIONS on Electronics, vol. E89-C, no. 6, pp. 725-731, June 2006, doi: 10.1093/ietele/e89-c.6.725.
Abstract: Four 50% duty-cycle divide-by-3 prescalers--positively/ negatively triggered sample-sample-hold (SSH) and sample-hold-hold (SHH) prescalers--are designed based on the current switchable D flip-flops and discussed in this paper. The positively triggered SSH and SHH prescalers are fabricated using the 0.35-µm SiGe BiCMOS technology and measured by the real-time oscilloscope and the spectrum analyzer. The SHH prescaler is our proposed structure and demonstrated in this paper. According to the measurement results, under the condition of the same input power, its maximum operation frequency is twice as high as that of the SSH prescaler thanks to better signal synchronization. At 2.7 V supply, the SSH prescaler operates from 500 MHz to 2 GHz as the SHH prescaler performs from 1 GHz to 3.4 GHz. The input sensitivity level of both structures is about -5 dBm, while the maximum output power is also about -5 dBm. The core current consumption is 4.538 mA and 4.258 mA for the SSH and SHH prescalers, respectively.
URL: https://global.ieice.org/en_transactions/electronics/10.1093/ietele/e89-c.6.725/_p

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@ARTICLE{e89-c_6_725,
author={Sheng-Che TSENG, Chinchun MENG, Wei-Yu CHEN, },
journal={IEICE TRANSACTIONS on Electronics},
title={True 50% Duty-Cycle SSH and SHH SiGe BiCMOS Divide-by-3 Prescalers},
year={2006},
volume={E89-C},
number={6},
pages={725-731},
abstract={Four 50% duty-cycle divide-by-3 prescalers--positively/ negatively triggered sample-sample-hold (SSH) and sample-hold-hold (SHH) prescalers--are designed based on the current switchable D flip-flops and discussed in this paper. The positively triggered SSH and SHH prescalers are fabricated using the 0.35-µm SiGe BiCMOS technology and measured by the real-time oscilloscope and the spectrum analyzer. The SHH prescaler is our proposed structure and demonstrated in this paper. According to the measurement results, under the condition of the same input power, its maximum operation frequency is twice as high as that of the SSH prescaler thanks to better signal synchronization. At 2.7 V supply, the SSH prescaler operates from 500 MHz to 2 GHz as the SHH prescaler performs from 1 GHz to 3.4 GHz. The input sensitivity level of both structures is about -5 dBm, while the maximum output power is also about -5 dBm. The core current consumption is 4.538 mA and 4.258 mA for the SSH and SHH prescalers, respectively.},
keywords={},
doi={10.1093/ietele/e89-c.6.725},
ISSN={1745-1353},
month={June},}

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TY - JOUR
TI - True 50% Duty-Cycle SSH and SHH SiGe BiCMOS Divide-by-3 Prescalers
T2 - IEICE TRANSACTIONS on Electronics
SP - 725
EP - 731
AU - Sheng-Che TSENG
AU - Chinchun MENG
AU - Wei-Yu CHEN
PY - 2006
DO - 10.1093/ietele/e89-c.6.725
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E89-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2006
AB - Four 50% duty-cycle divide-by-3 prescalers--positively/ negatively triggered sample-sample-hold (SSH) and sample-hold-hold (SHH) prescalers--are designed based on the current switchable D flip-flops and discussed in this paper. The positively triggered SSH and SHH prescalers are fabricated using the 0.35-µm SiGe BiCMOS technology and measured by the real-time oscilloscope and the spectrum analyzer. The SHH prescaler is our proposed structure and demonstrated in this paper. According to the measurement results, under the condition of the same input power, its maximum operation frequency is twice as high as that of the SSH prescaler thanks to better signal synchronization. At 2.7 V supply, the SSH prescaler operates from 500 MHz to 2 GHz as the SHH prescaler performs from 1 GHz to 3.4 GHz. The input sensitivity level of both structures is about -5 dBm, while the maximum output power is also about -5 dBm. The core current consumption is 4.538 mA and 4.258 mA for the SSH and SHH prescalers, respectively.
ER -