We propose a writing circuit scheme to screen intermittent failure cells for toggle MRAM. The scheme, comprising a current waveform circuitry that controls rise/fall time of writing current, drastically decreases the probability of intermittent failure. To apply the scheme to large-capacity MRAMs, a current booster containing discharging capacitors has also been developed. It adjusts the waveform of writing current to that designed by the current waveform circuitry even in presence of parasitic capacitors and resistors along the writing current path. Such a technique is essential for achieving stability in large-capacity MRAMs.
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Takeshi HONDA, Noboru SAKIMURA, Tadahiko SUGIBAYASHI, Naoki KASAI, Hiromitsu HADA, Shu-ichi TAHARA, "Writing Circuitry for Toggle MRAM to Screen Intermittent Failure Mode" in IEICE TRANSACTIONS on Electronics,
vol. E90-C, no. 2, pp. 531-535, February 2007, doi: 10.1093/ietele/e90-c.2.531.
Abstract: We propose a writing circuit scheme to screen intermittent failure cells for toggle MRAM. The scheme, comprising a current waveform circuitry that controls rise/fall time of writing current, drastically decreases the probability of intermittent failure. To apply the scheme to large-capacity MRAMs, a current booster containing discharging capacitors has also been developed. It adjusts the waveform of writing current to that designed by the current waveform circuitry even in presence of parasitic capacitors and resistors along the writing current path. Such a technique is essential for achieving stability in large-capacity MRAMs.
URL: https://global.ieice.org/en_transactions/electronics/10.1093/ietele/e90-c.2.531/_p
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@ARTICLE{e90-c_2_531,
author={Takeshi HONDA, Noboru SAKIMURA, Tadahiko SUGIBAYASHI, Naoki KASAI, Hiromitsu HADA, Shu-ichi TAHARA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Writing Circuitry for Toggle MRAM to Screen Intermittent Failure Mode},
year={2007},
volume={E90-C},
number={2},
pages={531-535},
abstract={We propose a writing circuit scheme to screen intermittent failure cells for toggle MRAM. The scheme, comprising a current waveform circuitry that controls rise/fall time of writing current, drastically decreases the probability of intermittent failure. To apply the scheme to large-capacity MRAMs, a current booster containing discharging capacitors has also been developed. It adjusts the waveform of writing current to that designed by the current waveform circuitry even in presence of parasitic capacitors and resistors along the writing current path. Such a technique is essential for achieving stability in large-capacity MRAMs.},
keywords={},
doi={10.1093/ietele/e90-c.2.531},
ISSN={1745-1353},
month={February},}
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TY - JOUR
TI - Writing Circuitry for Toggle MRAM to Screen Intermittent Failure Mode
T2 - IEICE TRANSACTIONS on Electronics
SP - 531
EP - 535
AU - Takeshi HONDA
AU - Noboru SAKIMURA
AU - Tadahiko SUGIBAYASHI
AU - Naoki KASAI
AU - Hiromitsu HADA
AU - Shu-ichi TAHARA
PY - 2007
DO - 10.1093/ietele/e90-c.2.531
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E90-C
IS - 2
JA - IEICE TRANSACTIONS on Electronics
Y1 - February 2007
AB - We propose a writing circuit scheme to screen intermittent failure cells for toggle MRAM. The scheme, comprising a current waveform circuitry that controls rise/fall time of writing current, drastically decreases the probability of intermittent failure. To apply the scheme to large-capacity MRAMs, a current booster containing discharging capacitors has also been developed. It adjusts the waveform of writing current to that designed by the current waveform circuitry even in presence of parasitic capacitors and resistors along the writing current path. Such a technique is essential for achieving stability in large-capacity MRAMs.
ER -