Measurement-Based Analysis of Electromagnetic Immunity in LSI Circuit Operation
Summary :
Impacts of electromagnetic (EM) interference (immunity) on operation of LSI circuits in a QFP-packaged and PCB-mounted environment are studied. EM power injection to a power-supply system leads to malfunction, where the power is translated into voltage bounces through combined on- and off- chip impedances, affecting power supply and ground, as well as signal nodes in a die, seen from on-chip waveform measurements. A lumped power-supply impedance model and the minimum amplitude of voltage bounce induced by EM power for malfunction, both of which can be derived from external measurements to a given packaged LSI, formulate an EM interference model that is helpful in the PCB design toward high immunity. The technique can be generally applied to systems-on-chip applications.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E91-C No.6 pp.936-944
- Publication Date
- 2008/06/01
- Publicized
- Online ISSN
- 1745-1353
- DOI
- 10.1093/ietele/e91-c.6.936
- Type of Manuscript
- Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
- Category
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Kouji ICHIKAWA, Yuki TAKAHASHI, Yukihiko SAKURAI, Takahiro TSUDA, Isao IWASE, Makoto NAGATA, "Measurement-Based Analysis of Electromagnetic Immunity in LSI Circuit Operation" in IEICE TRANSACTIONS on Electronics,
vol. E91-C, no. 6, pp. 936-944, June 2008, doi: 10.1093/ietele/e91-c.6.936.
Abstract: Impacts of electromagnetic (EM) interference (immunity) on operation of LSI circuits in a QFP-packaged and PCB-mounted environment are studied. EM power injection to a power-supply system leads to malfunction, where the power is translated into voltage bounces through combined on- and off- chip impedances, affecting power supply and ground, as well as signal nodes in a die, seen from on-chip waveform measurements. A lumped power-supply impedance model and the minimum amplitude of voltage bounce induced by EM power for malfunction, both of which can be derived from external measurements to a given packaged LSI, formulate an EM interference model that is helpful in the PCB design toward high immunity. The technique can be generally applied to systems-on-chip applications.
URL: https://global.ieice.org/en_transactions/electronics/10.1093/ietele/e91-c.6.936/_p
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@ARTICLE{e91-c_6_936,
author={Kouji ICHIKAWA, Yuki TAKAHASHI, Yukihiko SAKURAI, Takahiro TSUDA, Isao IWASE, Makoto NAGATA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Measurement-Based Analysis of Electromagnetic Immunity in LSI Circuit Operation},
year={2008},
volume={E91-C},
number={6},
pages={936-944},
abstract={Impacts of electromagnetic (EM) interference (immunity) on operation of LSI circuits in a QFP-packaged and PCB-mounted environment are studied. EM power injection to a power-supply system leads to malfunction, where the power is translated into voltage bounces through combined on- and off- chip impedances, affecting power supply and ground, as well as signal nodes in a die, seen from on-chip waveform measurements. A lumped power-supply impedance model and the minimum amplitude of voltage bounce induced by EM power for malfunction, both of which can be derived from external measurements to a given packaged LSI, formulate an EM interference model that is helpful in the PCB design toward high immunity. The technique can be generally applied to systems-on-chip applications.},
keywords={},
doi={10.1093/ietele/e91-c.6.936},
ISSN={1745-1353},
month={June},}
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TY - JOUR
TI - Measurement-Based Analysis of Electromagnetic Immunity in LSI Circuit Operation
T2 - IEICE TRANSACTIONS on Electronics
SP - 936
EP - 944
AU - Kouji ICHIKAWA
AU - Yuki TAKAHASHI
AU - Yukihiko SAKURAI
AU - Takahiro TSUDA
AU - Isao IWASE
AU - Makoto NAGATA
PY - 2008
DO - 10.1093/ietele/e91-c.6.936
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E91-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2008
AB - Impacts of electromagnetic (EM) interference (immunity) on operation of LSI circuits in a QFP-packaged and PCB-mounted environment are studied. EM power injection to a power-supply system leads to malfunction, where the power is translated into voltage bounces through combined on- and off- chip impedances, affecting power supply and ground, as well as signal nodes in a die, seen from on-chip waveform measurements. A lumped power-supply impedance model and the minimum amplitude of voltage bounce induced by EM power for malfunction, both of which can be derived from external measurements to a given packaged LSI, formulate an EM interference model that is helpful in the PCB design toward high immunity. The technique can be generally applied to systems-on-chip applications.
ER -
English
