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A BiCMOS Circuit Using a Base-Boost Technique for Low-Voltage, Low-Power Application

Kenichi OHHATA, Hiroaki NAMBU, Kazuo KANETANI, Toru MASUDA, Takeshi KUSUNOKI, Noriyuki HOMMA

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Summary :

BiCMOS circuits using a base-boost technique for low-voltage application have been proposed. These circuits can operate at supply voltages down to 1.5 V. Their power dissipation, however, is 1.5-2 times of that of the CMOS circuit. We propose a novel BiCMOS circuit dissipating less power than that of conventional circuits. A base-boost technique is a key to low-voltage operation, and a gate holding the output voltage and a depletion nMOS pre-charge transistor are also introduced to reduce the power dissipation. Results of simulations using 0.3µm BiCMOS device parameters show that base-boosted BiNMOS (BB-BiNMOS) circuit is 1.5 times faster than CMOS circuit even at 1 V and that its power dissipation is almost the same power as that of a CMOS circuit, the base-boosted BiCMOS (BB-BiCMOS) circuit is twice as fast and dissipates only 1.2 times as much power. The energy-delay product of the BB-BiCMOS circuit is smaller than that of conventional BiCMOS circuits and is about half of that of a CMOS circuit, the BB-BiCMOS circuit is thus the most promising high-speed circuits for low-voltage and low-power applications.

Publication
IEICE TRANSACTIONS on Electronics Vol.E79-C No.12 pp.1658-1665
Publication Date
1996/12/25
Publicized
Online ISSN
DOI
Type of Manuscript
Special Section PAPER (Special Issue on Low-Power LSI Technologies)
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