This paper reports on a high-speed silicon bipolar transistor with an fT and fMAX of over 40 GHz, we call it the Advanced Boro-silicated-glass Self-Aligned (A-BSA) transistor. In basic BSA technology, a CVD-BSG film is used not only as a diffusion source to form the intrinsic base and the link base regions but also as a sidewall spacer between the emitter and the base polysilicon electrodes. An A-BSA transistor offers three advancements to this technology: (1) a graded collector profile underneath the intrinsic base region to suppress the Kirk effect; (2) an optimized design of the link base region to prevent the frade-off effect between fT and base resistance; and (3) a newly developed buried emitter electrode structure, consisting of an N++-polysilicon layer, a platinum silicide layer, and a CVD tungsten plug, to prevent the emitter plug effect. Furthermore, our transistor uses a BPSG filled trench isolation to reduce parasitic capacitance and improve circuit performance. In this paper, we describe device design, process technology and characterization of the A-BSA transistor, with it we have performed several application ICs, operating at 10Gb/s and above. The A-BSA transistor achieved an fT of 41 GHz and an fMAX of 44 GHz under optimized conditions.
Tsutomu TASHIRO
Mitsuhiro SUGIYAMA
Hisashi TAKEMURA
Chihiro OGAWA
Masakazu KURISU
Hideki KITAHATA
Takenori MORIKAWA
Masahiko NAKAMAE
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Tsutomu TASHIRO, Mitsuhiro SUGIYAMA, Hisashi TAKEMURA, Chihiro OGAWA, Masakazu KURISU, Hideki KITAHATA, Takenori MORIKAWA, Masahiko NAKAMAE, "An Advanced BSG Self-Aligned (A-BSA) Transistor Technology for High Speed IC Implementation" in IEICE TRANSACTIONS on Electronics,
vol. E79-C, no. 12, pp. 1733-1740, December 1996, doi: .
Abstract: This paper reports on a high-speed silicon bipolar transistor with an fT and fMAX of over 40 GHz, we call it the Advanced Boro-silicated-glass Self-Aligned (A-BSA) transistor. In basic BSA technology, a CVD-BSG film is used not only as a diffusion source to form the intrinsic base and the link base regions but also as a sidewall spacer between the emitter and the base polysilicon electrodes. An A-BSA transistor offers three advancements to this technology: (1) a graded collector profile underneath the intrinsic base region to suppress the Kirk effect; (2) an optimized design of the link base region to prevent the frade-off effect between fT and base resistance; and (3) a newly developed buried emitter electrode structure, consisting of an N++-polysilicon layer, a platinum silicide layer, and a CVD tungsten plug, to prevent the emitter plug effect. Furthermore, our transistor uses a BPSG filled trench isolation to reduce parasitic capacitance and improve circuit performance. In this paper, we describe device design, process technology and characterization of the A-BSA transistor, with it we have performed several application ICs, operating at 10Gb/s and above. The A-BSA transistor achieved an fT of 41 GHz and an fMAX of 44 GHz under optimized conditions.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e79-c_12_1733/_p
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@ARTICLE{e79-c_12_1733,
author={Tsutomu TASHIRO, Mitsuhiro SUGIYAMA, Hisashi TAKEMURA, Chihiro OGAWA, Masakazu KURISU, Hideki KITAHATA, Takenori MORIKAWA, Masahiko NAKAMAE, },
journal={IEICE TRANSACTIONS on Electronics},
title={An Advanced BSG Self-Aligned (A-BSA) Transistor Technology for High Speed IC Implementation},
year={1996},
volume={E79-C},
number={12},
pages={1733-1740},
abstract={This paper reports on a high-speed silicon bipolar transistor with an fT and fMAX of over 40 GHz, we call it the Advanced Boro-silicated-glass Self-Aligned (A-BSA) transistor. In basic BSA technology, a CVD-BSG film is used not only as a diffusion source to form the intrinsic base and the link base regions but also as a sidewall spacer between the emitter and the base polysilicon electrodes. An A-BSA transistor offers three advancements to this technology: (1) a graded collector profile underneath the intrinsic base region to suppress the Kirk effect; (2) an optimized design of the link base region to prevent the frade-off effect between fT and base resistance; and (3) a newly developed buried emitter electrode structure, consisting of an N++-polysilicon layer, a platinum silicide layer, and a CVD tungsten plug, to prevent the emitter plug effect. Furthermore, our transistor uses a BPSG filled trench isolation to reduce parasitic capacitance and improve circuit performance. In this paper, we describe device design, process technology and characterization of the A-BSA transistor, with it we have performed several application ICs, operating at 10Gb/s and above. The A-BSA transistor achieved an fT of 41 GHz and an fMAX of 44 GHz under optimized conditions.},
keywords={},
doi={},
ISSN={},
month={December},}
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TY - JOUR
TI - An Advanced BSG Self-Aligned (A-BSA) Transistor Technology for High Speed IC Implementation
T2 - IEICE TRANSACTIONS on Electronics
SP - 1733
EP - 1740
AU - Tsutomu TASHIRO
AU - Mitsuhiro SUGIYAMA
AU - Hisashi TAKEMURA
AU - Chihiro OGAWA
AU - Masakazu KURISU
AU - Hideki KITAHATA
AU - Takenori MORIKAWA
AU - Masahiko NAKAMAE
PY - 1996
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E79-C
IS - 12
JA - IEICE TRANSACTIONS on Electronics
Y1 - December 1996
AB - This paper reports on a high-speed silicon bipolar transistor with an fT and fMAX of over 40 GHz, we call it the Advanced Boro-silicated-glass Self-Aligned (A-BSA) transistor. In basic BSA technology, a CVD-BSG film is used not only as a diffusion source to form the intrinsic base and the link base regions but also as a sidewall spacer between the emitter and the base polysilicon electrodes. An A-BSA transistor offers three advancements to this technology: (1) a graded collector profile underneath the intrinsic base region to suppress the Kirk effect; (2) an optimized design of the link base region to prevent the frade-off effect between fT and base resistance; and (3) a newly developed buried emitter electrode structure, consisting of an N++-polysilicon layer, a platinum silicide layer, and a CVD tungsten plug, to prevent the emitter plug effect. Furthermore, our transistor uses a BPSG filled trench isolation to reduce parasitic capacitance and improve circuit performance. In this paper, we describe device design, process technology and characterization of the A-BSA transistor, with it we have performed several application ICs, operating at 10Gb/s and above. The A-BSA transistor achieved an fT of 41 GHz and an fMAX of 44 GHz under optimized conditions.
ER -