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IEICE TRANSACTIONS on Electronics

High-Speed CMOS SRAM Technologies for Cache Applications

Koichiro ISHIBASHI

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Summary :

This parer describes high-speed CMOS SRAM circuit technologies used in cache memories. In recent years, high-speed SRAM technology has led to higher cycle frequencies, but the rate of increase in the SRAM density has slowed. Operating modes of high-speed SRAMs are compared and the advantage of wave-pipelined SRAMs in terms of cycle frequency is shown. Three types of sense amplifiers used in SRAMs are also compared from the viewpoint of speed and power dissipation. Current sense amplifiers provide high-speed operation with low power dissipation, while latch-type sense amplifiers appear most suitable for ultra-low-power SRAMs. Low voltage operation and size reduction of full CMOS cells are now the most pressing issues in the development of SRAMs for cache memories.

Publication
IEICE TRANSACTIONS on Electronics Vol.E79-C No.6 pp.724-734
Publication Date
1996/06/25
Publicized
Online ISSN
DOI
Type of Manuscript
Special Section INVITED PAPER (Special Issue on ULSI Memory Technology)
Category
Static RAMs

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