In this paper, we describe our SFQ circuit design and measurement carried out in SRL-ISTEC. We are studying an oversampling sigma-delta modulator and a counter-type decimation filter with multistage structure for developing AD converters for software-defined radio application. We are also developing a superconducting memory, whose peripheral circuits are constructed with SFQ circuits.
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Kazunori MIYAHARA, Shuichi NAGASAWA, Haruhiro HASEGAWA, Tatsunori HASHIMOTO, Hideo SUZUKI, Youichi ENOMOTO, "Design of SFQ Circuits and Their Measurement" in IEICE TRANSACTIONS on Electronics,
vol. E85-C, no. 3, pp. 603-607, March 2002, doi: .
Abstract: In this paper, we describe our SFQ circuit design and measurement carried out in SRL-ISTEC. We are studying an oversampling sigma-delta modulator and a counter-type decimation filter with multistage structure for developing AD converters for software-defined radio application. We are also developing a superconducting memory, whose peripheral circuits are constructed with SFQ circuits.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e85-c_3_603/_p
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@ARTICLE{e85-c_3_603,
author={Kazunori MIYAHARA, Shuichi NAGASAWA, Haruhiro HASEGAWA, Tatsunori HASHIMOTO, Hideo SUZUKI, Youichi ENOMOTO, },
journal={IEICE TRANSACTIONS on Electronics},
title={Design of SFQ Circuits and Their Measurement},
year={2002},
volume={E85-C},
number={3},
pages={603-607},
abstract={In this paper, we describe our SFQ circuit design and measurement carried out in SRL-ISTEC. We are studying an oversampling sigma-delta modulator and a counter-type decimation filter with multistage structure for developing AD converters for software-defined radio application. We are also developing a superconducting memory, whose peripheral circuits are constructed with SFQ circuits.},
keywords={},
doi={},
ISSN={},
month={March},}
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TY - JOUR
TI - Design of SFQ Circuits and Their Measurement
T2 - IEICE TRANSACTIONS on Electronics
SP - 603
EP - 607
AU - Kazunori MIYAHARA
AU - Shuichi NAGASAWA
AU - Haruhiro HASEGAWA
AU - Tatsunori HASHIMOTO
AU - Hideo SUZUKI
AU - Youichi ENOMOTO
PY - 2002
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E85-C
IS - 3
JA - IEICE TRANSACTIONS on Electronics
Y1 - March 2002
AB - In this paper, we describe our SFQ circuit design and measurement carried out in SRL-ISTEC. We are studying an oversampling sigma-delta modulator and a counter-type decimation filter with multistage structure for developing AD converters for software-defined radio application. We are also developing a superconducting memory, whose peripheral circuits are constructed with SFQ circuits.
ER -