Design Optimization Methodology for On-Chip Spiral Inductors
Summary :
This paper presents a methodology for optimizing the layout of on-chip spiral inductors using structural parameters and design frequency in a response surface method. The proposed method uses scattering parameters (S-parameter) to express inductor characteristics, and hence is independent of spiral geometries and equivalent circuit models. The procedure of inductor optimization is described, and a design example is presented.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E87-C No.6 pp.933-941
- Publication Date
- 2004/06/01
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- Special Section PAPER (Special Section on Analog Circuit and Device Technologies)
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Kenichi OKADA, Hiroaki HOSHINO, Hidetoshi ONODERA, "Design Optimization Methodology for On-Chip Spiral Inductors" in IEICE TRANSACTIONS on Electronics,
vol. E87-C, no. 6, pp. 933-941, June 2004, doi: .
Abstract: This paper presents a methodology for optimizing the layout of on-chip spiral inductors using structural parameters and design frequency in a response surface method. The proposed method uses scattering parameters (S-parameter) to express inductor characteristics, and hence is independent of spiral geometries and equivalent circuit models. The procedure of inductor optimization is described, and a design example is presented.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/e87-c_6_933/_p
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@ARTICLE{e87-c_6_933,
author={Kenichi OKADA, Hiroaki HOSHINO, Hidetoshi ONODERA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Design Optimization Methodology for On-Chip Spiral Inductors},
year={2004},
volume={E87-C},
number={6},
pages={933-941},
abstract={This paper presents a methodology for optimizing the layout of on-chip spiral inductors using structural parameters and design frequency in a response surface method. The proposed method uses scattering parameters (S-parameter) to express inductor characteristics, and hence is independent of spiral geometries and equivalent circuit models. The procedure of inductor optimization is described, and a design example is presented.},
keywords={},
doi={},
ISSN={},
month={June},}
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TY - JOUR
TI - Design Optimization Methodology for On-Chip Spiral Inductors
T2 - IEICE TRANSACTIONS on Electronics
SP - 933
EP - 941
AU - Kenichi OKADA
AU - Hiroaki HOSHINO
AU - Hidetoshi ONODERA
PY - 2004
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E87-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2004
AB - This paper presents a methodology for optimizing the layout of on-chip spiral inductors using structural parameters and design frequency in a response surface method. The proposed method uses scattering parameters (S-parameter) to express inductor characteristics, and hence is independent of spiral geometries and equivalent circuit models. The procedure of inductor optimization is described, and a design example is presented.
ER -
English
