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Millimeter-Wave Transceiver Utilizing On-Chip Butler Matrix for Simultaneous 5G Relay Communication and Wireless Power Transfer

Keito YUASA, Michihiro IDE, Sena KATO, Kenichi OKADA, Atsushi SHIRANE

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Summary :

This paper introduces a wireless-powered relay transceiver designed to extend 5G millimeter-wave coverage. It employs an on-chip butler matrix, enabling beam control-free operation. The prototype includes PCB array antennas and on-chip butler matrix and rectifiers manufactured using a Si CMOS 65 nm process. The relay transceiver performs effectively in beam angles from -45° to 45°. In the 24 GHz wireless power transmission (WPT) mode, it generates 0.12 mW with 0 dBm total input power, boasting an RF-DC conversion efficiency of 12.2%. It also demonstrates communication performance at 28 GHz in both RX and TX modes with a 100 MHz bandwidth and 64QAM modulation.

Publication
IEICE TRANSACTIONS on Electronics Vol.E107-C No.10 pp.408-415
Publication Date
2024/10/01
Publicized
2024/04/15
Online ISSN
1745-1353
DOI
10.1587/transele.2023CTP0003
Type of Manuscript
Special Section PAPER (Special Section on Analog Circuits and Their Application Technologies)
Category

1.  Introduction

In recent years, the development of the fifth-generation mobile communication system (5G) has been widely researched and mobile communication system advancements are underway worldwide. 5G communication is expected to be applied in high-speed, high-capacity communication (enhanced Mobile Broadband: eMBB). However, the frequency bands used in 5G communication suffer from significant propagation losses and attenuation through obstacles like buildings, leading to insufficient coverage in 5G communication areas. Therefore, phased array communication with high antenna gain and the ability to focus communication power density in any direction through beamforming has become one of the most important technologies [1]-[6]. Furthermore, to expand the coverage of 5G networks and maintain seamless communication, large-scale relay systems for non-line-of-sight (NLoS) communication are essential.

In 5G communication relay systems, two methods are considered: metasurface reflectors (reflect arrays) and relay transceivers. Metasurface reflectors reflect radio waves transmitted from base stations (BS) towards user equipment (UE) to establish NLoS communication by circumventing obstacles along the communication path. Large-scale implementation of relay systems allows for flexible deployment, thus reducing manufacturing and maintenance costs. However, the beam angle is fixed depending on the installation location, and active control of the reflection beam angle is not possible. Moreover, propagation losses in NLoS communication paths are several tens of decibels higher compared to LoS paths [7], [8].

On the other hand, relay transceivers can control the beam angle and compensate for propagation losses by amplifying received power with built-in amplifiers and performing beamforming towards target UE in Fig. 1. However, relay transceivers require power supply from external sources. Furthermore, regular maintenance of external power sources is essential for long-term operation of relay transceivers, raising concerns about increased operating costs. Therefore, from the perspective of large-scale deployment of relay systems, power consumption and operating costs become disadvantages [9]-[12].

Fig. 1  Concept of relay transceiver implementation.

These challenges can be addressed using beamforming relay transceivers with wireless power transfer (WPT). By supplying power to the relay transceiver through WPT, the need for external power sources is eliminated. This makes it possible to integrate all circuit blocks on a single board, facilitating dustproof and waterproof protection and enhancing durability. Consequently, maintenance costs can be reduced, making it suitable for large-scale deployments [13]-[23]. However, conventional relay transceivers using WPT for beamforming relied on switching-type phase control or external phase shifters [24], [25]. In these cases, beamforming could not be achieved until the phase shifter was controlled during the relay transceiver startup, highlighting the importance of relay stations that do not require beam control during startup. To address this, this paper proposes a new relay transceiver that does not require beam control during startup by incorporating a Butler matrix corresponding to beam angles of 45\(^{\circ}\), 15\(^{\circ}\), \(-15^{\circ}\), and \(-45^{\circ}\).

Furthermore, this relay transceiver can perform both power generation and transceiving (TRX) simultaneously. This demonstrates a new approach to expanding 5G communication coverage and achieving efficient communication.

The structure of this paper is as follows. In Sect. 2, the proposed relay transceiver is explained, and the entire relay system is introduced in the same section. Section 3 describes the circuit operation and implementation of the relay transceiver. Section 4 presents measurement results, and finally, the conclusion is provided in Sect. 5.

2.  Wirelessly Powered Relay Transceiver

An overview of the proposed wirelessly powered relay transceiver is shown in Fig. 2. In 5G communication, millimeter-wave frequencies are used at 28 GHz, while the frequencies for LO (Local Oscillator) or WPT are set at 24 GHz. Both 28 GHz and 24 GHz within the ISM band (Industrial, Scientific, Medical band), allowing for the utilization of relatively high Equivalent Isotropically Radiated Power (EIRP). Additionally, due to their location in the millimeter-wave range, efficient pinpoint power transfer can be achieved using phased array technology. For these reasons, 28 GHz and 24 GHz is chosen for communication purposes, and LO/WPT, with expectations of global research and application for these frequency bands. The proposed relay transceiver consists of four elements: antennas, a Butler matrix comprising a 90\(^{\circ}\) hybrid coupler and 45\(^{\circ}\) phase shifter, and a rectifier. To realize the actual relay operation, the system includes two proposed transceivers, each comprising a receiver and a transmitter. These two transceivers are connected through IF switches, amplifiers, and combiners for power combines.

Fig. 2  Block diagram of the entire proposed relay transceiver system.

This system encompasses three functions: receive, transmit, and power reception. In RX, four-element antennas receive 24 GHz LO and 28 GHz RF (Radio Frequency) signals at specified beam angles. The received signals are power combined by the Butler matrix and subsequently outputted to one of the four output ports. Next, the 28 GHz RF signal is mixed with the 24 GHz LO signal via a rectifier, down-converting it to a 4 GHz IF (Intermediate Frequency) signal, which is then outputted from I/O1.

In TX, the system initially receives a 24 GHz LO signal from the antenna and outputs it to one port via the Butler matrix. Subsequently, the 4 GHz IF signal is input into the rectifier’s port, where it is mixed with the 24 GHz LO signal, up-converting it to a 28 GHz RF signal. This RF signal is phase-controlled by the Butler matrix and transmitted in the same direction as the received 24 GHz LO signal.

In WPT mode, the system receives a 24 GHz signal from the antenna and outputs it to one port through the Butler matrix. The RF signal is rectified to DC voltage through the rectifier, and DC power is outputted from the port. The WPT mode can operate simultaneously in both RX or TX modes. IF signals and DC power are separated by a filter. DC power is stored in a large-capacity capacitor, and controlled by a Power Management Unit (PMU).

3.  Proposed Relay Transceiver Circuit Architecture

This section explains the circuit operation and implementation of the receiver and transmitter.

3.1  Butler Matrix

The circuit diagram of the Butler matrix and the incremental phase differences between each input (P1 to P4) and each output (OUT1 to OUT4) are shown in Fig. 3. The Butler matrix can be quantitatively represented through fast Fourier transforms, allowing for analysis [16].

Fig. 3  On-chip butler matrix operation at input phase difference \(\varphi =45^{\circ}\).

As examples of the configurations of 90\(^{\circ}\) couplers used in the Butler matrix, there are branch-line couplers, LC-type couplers, and coupled-line couplers. In the proposed relay transceiver, a coupled-line 90\(^{\circ}\) coupler is designed to achieve wideband operation at 24 GHz and 28 GHz (Fig. 4).

Fig. 4  Simulation results of 90\(^{\circ}\) hybrid coupler. (CPL: Couple, THR: Through, ISO: Isolation.)

When the input port has a phase difference \(\varphi\) of 45\(^{\circ}\), the phases align at OUT1, and the signal is transferred there. Simultaneously, the signals from OUT2 to OUT4 have phase differences that cancel each other out and are not output. Therefore, only OUT1 outputs a signal. For input phase differences of \(\varphi = -135^{\circ}\), \(-45^{\circ}\), and 135\(^{\circ}\), signals are respectively output from OUT2, OUT3, and OUT4. Simulation results of the output from OUT1 to OUT4 for input phase differences are shown in Fig. 5. When the input power to each port is 0 dBm (total input power 6 dBm), the power at each output port for input phase differences of \(\varphi = 45^{\circ}\), \(-135^{\circ}\), 135\(^{\circ}\), and \(-45^{\circ}\) is 3.50 dBm, 3.29 dBm, 3.29 dBm, and 3.50 dBm, respectively. Therefore, the insertion loss of the Butler Matrix is between 2.50 and 2.71 dB. When converted to beam angles (\(\theta\)), input phase differences of \(\varphi = -135^{\circ}\), \(-45^{\circ}\), 45\(^{\circ}\), and 135\(^{\circ}\) correspond to \(\theta = -45^{\circ}\), \(-15^{\circ}\), 15\(^{\circ}\), and 45\(^{\circ}\), respectively.

Fig. 5  Simulation results of on-chip Butler matrix.

3.2  Rectifier

The rectifier consists of a cross-coupled nMOS pair with a 1:2.5 balun, as depicted in Fig. 6 [25]. The gate width to gate length ratio of the nMOS is 36 um/60 nm. The circuit’s output is at the center tap of the balun. The turns ratio of the balun is adjusted to match during high signal input in both the input and output sections, ensuring sufficient voltage at 6 dBm input power. The rectifier circuit utilizes the differential output signals from the balun to drive the nMOS pair in current-source mode [17].

Fig. 6  Frequency conversion operation in rectifier.

Fig. 7  Rectification operation in rectifier.

The rectifier performs both frequency mixing and rectification operations.

First, we explain the frequency conversion. In the RX, down-conversion is performed, while in the TX, up-conversion is carried out.

In RX, the 28 GHz signal is input at the drain, and the 24 GHz signal is input at the gate to down-convert the 4 GHz IF signal. Because the gate-source voltage (\(V_\mathrm{GS}\)) and drain-source voltage (\(V_\mathrm{DS}\)) are sinusoidal waves of different frequencies, the IF signal appears in the drain current (\(I_\mathrm{DS}\)). These are power combined through the center tap of the balun and then output. In Fig. 8, there are distortion characteristics of the IF signal at a total input LO power of \(-2\) dBm (for 4 arrays).

Fig. 8  Simulated results for the RX linearity characteristics.

In TX, the 28 GHz RF signal is up-converted, so the 24 GHz signal is input at the drain, and the 4 GHz signal is input at the gate. M1 and M2 create a differential 28 GHz RF signal, which is outputted through the balun as a combined 28 GHz RF signal at one port.

In WPT mode, a 24 GHz signal is converted to DC (Fig. 7).

The 24 GHz WPT signal is separated as a differential signal, and it is input with 180 degrees of phase difference to the drain and gate of M1 and M2. This design ensures high RF-DC conversion efficiency with a full-wave rectifier. Additionally, the WPT mode can operate simultaneously with the RX or TX modes.

It is important for the rectifier to have a high Power Conversion Efficiency (PCE). PCE is an indicator of how effectively the rectifier converts RF signals to DC power and is calculated as the output DC power (\(P_\mathrm{out}\)) divided by the input RF power (\(P_\mathrm{in}\)).

Considering the rectifier’s losses, low threshold voltage, and low leakage current, the overall \(PCE\) is represented as Eq. (1). Here, \(P_\mathrm{IL}\) represents the total insertion loss between the antenna and the rectifier, and \(P_\mathrm{RL}\) indicates the losses in the rectifier.

\[\begin{align} PCE=\frac{P_{out}}{P_{in}}=\frac{P_{\mathrm{out}}}{P_{out}+P_{RL}+P_{IL}} \tag{1} \end{align}\]

Since even slight insertion losses can significantly reduce \(PCE\), it’s crucial to keep the insertion losses low.

3.3  Antenna Design

Figure 9 illustrates a dual-band phased array antenna supporting both 24 GHz WPT and 28 GHz 5G communication. The antenna substrate uses Megtron6 R5775K with a relative dielectric constant of 3.6 and a dielectric loss tangent of 0.004. The antenna consists of five copper layers: L1 for the transmission line, L2 for the ground layer, L3 for the transmission line, L4 for the ground layer, and L5 for the patch antenna layer. The spacing d between the antennas corresponds to 5.3 mm, which is half a wavelength at 28 GHz. To achieve dual-band gain, U-slot antennas are used, where the main patch and the U-slot resonate at different frequencies to provide dual-band characteristics [26].

Fig. 9  Antenna model and layer illustration.

In Fig. 10, photos of the prototype relay transceiver and the IC chip are shown [27]. The IC chip is manufactured using a CMOS 65 nm process and features an active 4x1 antenna array on the surface, along with a reference antenna for measuring input power. The backside of the chip includes transmission lines to connect to the IC chip and IF connectors. The IC and IF connector employ equal-length wiring to compensate for phase differences for the four output ports. Additionally, the connection between the IC and PCB is achieved through wire bonding. The relay transceiver has dimensions of 7.5 cm x 10 cm, and 1.16 mm x 0.86 mm for the IC chip.

Fig. 10  Photo of proposed relay transceiver and chip micrograph.

4.  Measurement Results

First, the probe measurement results of RF-DC conversion efficiency concerning the input power for WPT in the proposed relay transceiver are shown in Fig. 11. When the input power is \(-1\) dBm, the RF-DC conversion efficiency reaches its maximum at 13.0%. When comparing with the simulation results, it is conceivable that losses in the transmission lines on the PCB and losses due to wire bonding could be considered. At a total WPT power of \(-1\) dBm, distortion characteristics leading to P1dB are observed.

Fig. 11  On-chip measurement result: power generations as functions of input power.

Second, OTA (Over-the-Air) measurement results are presented. OTA performance evaluation was carried out using a 4x1 dual-band phased array antenna board.

The measurement setup for TRX and WPT beam patterns is depicted in Fig. 12. In the evaluation of beam patterns, horn antennas at 24 GHz and 28 GHz were irradiated onto the board from the same direction, and the communication distance was set to 0.2 m, as in the WPT measurements. The 28 GHz RF signal was generated using Keysight (PSG) E8267D, while the 24 GHz LO and WPT signals were generated using Anritsu MG 3694C. In the measurements, the up-converted 4 GHz IF signal or the down-converted 28 GHz RF signal was measured using Keysight SA N9030B. The load resistance for WPT was adjusted to 160 \(\Omega\), which maximizes RF-DC conversion efficiency. Voltage was measured using the digital multimeter Keysight 3411A to determine efficiency.

Fig. 12  OTA measurement setup of the relay transceiver.

In RX measurement, the RF power directly below the 4-element phased array antenna at 28 GHz was \(-19\) dBm, and the LO power at 24 GHz was 12 dBm. In TX measurement, the input power for the 4 GHz IF signal on the prototype board was \(-11\) dBm, and the signal power at 24 GHz directly below the 4-element phased array antenna was 9 dBm. In WPT mode, 24 GHz was set to 0 dBm.

First, the beam pattern measurement results for TRX and WPT are shown in Fig. 13. The amplitude of the beam pattern is normalized in TRX. From the results in Fig. 11, beam steering is achieved at \(-45^{\circ}\), \(-15^{\circ}\), 15\(^{\circ}\), and 45\(^{\circ}\) for both RX and TX. The conversion gain in the four beam directions is \(-12.0\) dB in RX and \(-21.9\) dB in TX. In WPT mode, the beam pattern allows power generation at \(-45^{\circ}\), \(-15^{\circ}\), 15\(^{\circ}\), and 45\(^{\circ}\). The maximum output power is 0.12 mW, and the RF-DC conversion efficiency reaches 12.2%. Note: Efficiency was calculated based on the input power received by the reference antenna.

Fig. 13  Measurement results of the beam pattern: (a) RX, (b) TX, (c) WPT mode.

Subsequently, the EVM (Error Vector Magnitude) results are presented in Table 1. EVM evaluation was conducted using modulation signals generated by Keysight arbitrary waveform generator (AWG) M8190A. The beam angle was fixed at 15\(^{\circ}\) for both 24 GHz and 28 GHz during the measurements. In RX, EVM performance for QPSK is \(-30.5\) dB, for 16QAM is \(-30.6\) dB, for 32QAM is \(-31.8\) dB, and for 64QAM is \(-31.8\) dB. In TX, EVM performance for QPSK is \(-26.4\) dB, for 16QAM is \(-26.1\) dB, for 32QAM is \(-27.4\) dB, and for 64QAM is \(-27.0\) dB.

Table 1  EVM performance.

Table 2 provides a comparison with other state-of-the-art research results. The proposed relay transceiver demonstrates high Up/Down conversion gains. This system not only combines power generation and TRX operation but also enables beamforming without beam control due to the proposed on-chip Butler matrix.

Table 2  Performance comparison with 5G phased array transceivers.

Figure 14 illustrates the level diagrams for the uplink and downlink. Each condition is described in Table 3. The transmission distance for WPT is set at 5 m, while communication distances between the UE and BS are assumed to be 5 m and 100 m, respectively. The array size of the conventional transceiver is calculated to achieve the same EIRP as the proposed relay transceiver. 4096-array is used for both uplink and downlink [24]. The proposed relay transceiver employs a 4096-array antenna and is capable of transmitting and receiving 64QAM modulation signals with a bandwidth of 100 MHz in the downlink and 16QAM in the uplink. The estimated power consumption of the IF chain is 140 mW, which can be supplied solely by 24 GHz WPT. Furthermore, with nearly the same EIRP, the proposed module generates and supplies even more power using the 4096-array transceiver.

Fig. 14  Level diagrams for (a) uplink and (b) downlink.

Table 3  Condition for level diagram calculation.

5.  Conclusion

This paper implemented a 4x1 phased array antenna with an on-chip Butler matrix and evaluated its performance. The proposed relay transceiver is capable of beamforming at angles of \(-45^{\circ}\), \(-15^{\circ}\), 15\(^{\circ}\), and 45\(^{\circ}\), and it can perform RX and TX without beam control. In terms of communication performance, using 64QAM modulation, it achieves EVM of 31.8 dB in RX and \(-27.0\) dB in TX. Furthermore, when converting 24 GHz WPT signals to DC power, it can achieve a conversion efficiency of 12.2%. This proposed technology enables relay transceivers without beam control, making it a significant contribution to expanding 5G coverage for wireless power relay deployment on a large scale.

Acknowledgments

This work is partially supported by the MIC/SCOPE (#192203002, #192103003), JSPS (JP20H00236), MIC (JPJ000254), NICT (00601), STAR, and VDEC in collaboration with Cadence Design Systems, Inc., Mentor Graphics, Inc., and Keysight Technologies Japan, Ltd.

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Authors

Keito YUASA
  Tokyo Institute of Technology

received the B.E. degree from the Department of Electrical and Electronic Engineering, Tokyo Institute of Technology, Tokyo, Japan, in 2022. He is currently pursuing the M.S. degree in the electrical and electronic engineering with Tokyo Institute of Technology. His research interests include CMOS millimeter-wave transceiver system, 5G communication, phased-array transceiver, and wireless power transfer system.

Michihiro IDE
  Tokyo Institute of Technology

received the B.E., and M.E. degree from the Department of Electrical and Electronic Engineering, Tokyo Institute of Technology, Tokyo, Japan, in 2020, and 2022. His research interests include CMOS millimeter-wave transceiver system, 5G communication, phased-array transceiver, and wireless power transfer system.

Sena KATO
  Tokyo Institute of Technology

received the B.E. degree from the Department of Electrical and Electronic Engineering, Tokyo Institute of Technology, Tokyo, Japan, in 2023. He is currently pursuing the M.S. degree in the electrical and electronic engineering with Tokyo Institute of Technology. His research interests include CMOS millimeter-wave transceiver system, wireless power transfer system, and satellite communication, and device modeling.

Kenichi OKADA
  Tokyo Institute of Technology

received the B.E., M.E., and Ph.D. degrees in communications and computer engineering from Kyoto University, Kyoto, Japan, in 1998, 2000, and 2003, respectively. From 2000 to 2003, he was a Research Fellow with the Japan Society for the Promotion of Science, Kyoto University. In 2003, he joined the Tokyo Institute of Technology, Tokyo, Japan, as an Assistant Professor, where he is currently a Professor of electrical and electronic engineering. He has authored or coauthored more than 500 journal and conference papers. His current research interests include millimeter-wave and terahertz CMOS wireless transceivers for 20/28/39/60/77/79/100/300 GHz for 5G, satellite and future wireless systems, digital PLL, synthesizable PLL, atomic clock, and ultra-low-power wireless transceivers for Bluetooth low energy, and sub-GHz applications. Prof. Okada is a member of the Institute of Electronics, Information and Communication Engineers (IEICE), the Information Processing Society of Japan (IPSJ), and the Japan Society of Applied Physics (JSAP). He was a recipient or co-recipient of the Ericsson Young Scientist Award, in 2004, the A-SSCC Outstanding Design Award, in 2006 and 2011, the ASP-DAC Special Feature Award, in 2011, the Best Design Award, in 2014 and 2015, the MEXT Young Scientists’ Prize in 2011, the JSPS Prize in 2014, the Suematsu Yasuharu Award, in 2015, the MEXT Prizes for Science and Technology, in 2017, the RFIT Best Paper Award, in 2017, the IEICE Best Paper Award, in 2018, the RFIC Symposium Best Student Paper Award, in 2019, the IEICE Achievement Award, in 2019, the DOCOMO Mobile Science Award, in 2019, the IEEE/ACM ASP-DAC Prolific Author Award, in 2020, the Kenjiro Takayanagi Achievement Award, in 2020, the KDDI Foundation Award, in 2020, the IEEE CICC Best Paper Award, in 2020, and more than 50 other international and domestic awards. He is/was a member of the technical program committees of the IEEE International Solid-State Circuits Conference (ISSCC), the VLSI Circuits Symposium, the European Solid-State Circuits Conference (ESSCIRC), the Radio Frequency Integrated Circuits Symposium (RFIC), and the Asian Solid-State Circuits Conference (A-SSCC). He is/was also a Guest Editor and an Associate Editor of IEEE JOURNAL OF SOLID-STATE CIRCUITS (JSSC), an Associate Editor of IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES (T-MTT), and a Distinguished Lecturer of the IEEE Solid-State Circuits Society (SSCS).

Atsushi SHIRANE
  Tokyo Institute of Technology

received the B.E. degree in electrical and electronic engineering and the M.E. and Ph.D. degrees in electronics and applied physics from the Tokyo Institute of Technology, Tokyo, Japan, in 2010, 2012, and 2015, respectively. From 2015 to 2017, he was with Toshiba Corporation, Kawasaki, Japan, where he developed 802.11ax wireless LAN RF transceiver. From 2017 to 2018, he was with Nidec Corporation, Kawasaki, Japan, where he researched on intelligent motor with wireless communication. He is currently an Associate Professor with the Laboratory for Future Interdisciplinary Research of Science and Technology, Institute of Innovative Research, Tokyo Institute of Technology. His current research interests include RF CMOS transceivers for the IoT, 5G, and satellite communication and wireless power transfer. Dr. Atsushi is a member of the IEEE Solid-State Circuits Society and the Institute of Electronics, Information and Communication Engineers (IEICE). Since 2019, he has been a member of the technical program committee for IEEE International Solid-State Circuits Conference Student Research Preview.

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