Column-Parallel ADCs for CMOS Image Sensors and Their FoM-Based Evaluations

Shoji KAWAHITO

doi:10.1587/transele.E101.C.444

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Column-Parallel ADCs for CMOS Image Sensors and Their FoM-Based Evaluations

Shoji KAWAHITO

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This paper reviews architectures and topologies for column-parallel analog-to-digital converters (ADCs) used for CMOS image sensors (CISs) and discusses the performance of CISs using column-parallel ADCs based on figures-of-merit (FoM) with considering noise models which behave differently at low/middle and high pixel-rate regions. Various FoM considering different performance factors are defined. The defined FoM are applied to surveyed data on reported CISs using column-parallel ADCs which are categorized into 4 types; single slope, SAR, cyclic and delta-sigma ADCs. The FoM defined by (noise)²(power)/(pixel-rate) separately for low/middle and high pixel-rate regions well explains the frontline of the CIS' performance in all the pixel rates. Using the FoM defined by (noise)²(power)/(intrascene dynamic range)(pixel-rate), the effectiveness of recently-reported techniques for extended-dynamic-range CISs is clarified.

Publication: IEICE TRANSACTIONS on Electronics Vol.E101-C No.7 pp.444-456

Publication Date: 2018/07/01

Publicized

Online ISSN: 1745-1353

DOI: 10.1587/transele.E101.C.444

Type of Manuscript: Special Section INVITED PAPER (Special Section on Analog Circuits and Their Application Technologies)

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Authors

Shoji KAWAHITO
Shizuoka University

Keyword

CMOS image sensor, column-parallel ADC, cyclic ADC, delta-sigma modulation, single-slope ADC, SAR ADC, figure of merit

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Shoji KAWAHITO, "Column-Parallel ADCs for CMOS Image Sensors and Their FoM-Based Evaluations" in IEICE TRANSACTIONS on Electronics, vol. E101-C, no. 7, pp. 444-456, July 2018, doi: 10.1587/transele.E101.C.444.
Abstract: This paper reviews architectures and topologies for column-parallel analog-to-digital converters (ADCs) used for CMOS image sensors (CISs) and discusses the performance of CISs using column-parallel ADCs based on figures-of-merit (FoM) with considering noise models which behave differently at low/middle and high pixel-rate regions. Various FoM considering different performance factors are defined. The defined FoM are applied to surveyed data on reported CISs using column-parallel ADCs which are categorized into 4 types; single slope, SAR, cyclic and delta-sigma ADCs. The FoM defined by (noise)²(power)/(pixel-rate) separately for low/middle and high pixel-rate regions well explains the frontline of the CIS' performance in all the pixel rates. Using the FoM defined by (noise)²(power)/(intrascene dynamic range)(pixel-rate), the effectiveness of recently-reported techniques for extended-dynamic-range CISs is clarified.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E101.C.444/_p

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@ARTICLE{e101-c_7_444,
author={Shoji KAWAHITO, },
journal={IEICE TRANSACTIONS on Electronics},
title={Column-Parallel ADCs for CMOS Image Sensors and Their FoM-Based Evaluations},
year={2018},
volume={E101-C},
number={7},
pages={444-456},
abstract={This paper reviews architectures and topologies for column-parallel analog-to-digital converters (ADCs) used for CMOS image sensors (CISs) and discusses the performance of CISs using column-parallel ADCs based on figures-of-merit (FoM) with considering noise models which behave differently at low/middle and high pixel-rate regions. Various FoM considering different performance factors are defined. The defined FoM are applied to surveyed data on reported CISs using column-parallel ADCs which are categorized into 4 types; single slope, SAR, cyclic and delta-sigma ADCs. The FoM defined by (noise)²(power)/(pixel-rate) separately for low/middle and high pixel-rate regions well explains the frontline of the CIS' performance in all the pixel rates. Using the FoM defined by (noise)²(power)/(intrascene dynamic range)(pixel-rate), the effectiveness of recently-reported techniques for extended-dynamic-range CISs is clarified.},
keywords={},
doi={10.1587/transele.E101.C.444},
ISSN={1745-1353},
month={July},}

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TY - JOUR
TI - Column-Parallel ADCs for CMOS Image Sensors and Their FoM-Based Evaluations
T2 - IEICE TRANSACTIONS on Electronics
SP - 444
EP - 456
AU - Shoji KAWAHITO
PY - 2018
DO - 10.1587/transele.E101.C.444
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E101-C
IS - 7
JA - IEICE TRANSACTIONS on Electronics
Y1 - July 2018
AB - This paper reviews architectures and topologies for column-parallel analog-to-digital converters (ADCs) used for CMOS image sensors (CISs) and discusses the performance of CISs using column-parallel ADCs based on figures-of-merit (FoM) with considering noise models which behave differently at low/middle and high pixel-rate regions. Various FoM considering different performance factors are defined. The defined FoM are applied to surveyed data on reported CISs using column-parallel ADCs which are categorized into 4 types; single slope, SAR, cyclic and delta-sigma ADCs. The FoM defined by (noise)²(power)/(pixel-rate) separately for low/middle and high pixel-rate regions well explains the frontline of the CIS' performance in all the pixel rates. Using the FoM defined by (noise)²(power)/(intrascene dynamic range)(pixel-rate), the effectiveness of recently-reported techniques for extended-dynamic-range CISs is clarified.
ER -