IEICE TRANSACTIONS on Electronics
Kink Suppression and High Reliability of Asymmetric Dual Channel Poly-Si Thin Film Transistors for High Voltage Bias Stress
Summary :
Asymmetrically designed polycrystalline silicon (poly-Si) thin film transistors (TFT) were fabricated and investigated to suppress kink effect and to improve electrical reliability. Asymmetric dual channel length poly-Si TFT (ADCL) shows the best reduction of kink and leakage currents. Technology computer-aided design simulation proves that ADCL can induce properly high voltage at floating node of the TFT at high drain-source voltage (VDS), which can mitigate the impact ionization and the degradation of the transconductance of the TFT showing high reliability under the hot carrier stress.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E102-C No.1 pp.95-98
- Publication Date
- 2019/01/01
- Publicized
- Online ISSN
- 1745-1353
- DOI
- 10.1587/transele.E102.C.95
- Type of Manuscript
- BRIEF PAPER
- Category
- Semiconductor Materials and Devices
Authors
Joonghyun PARK
Sungkyunkwan University
Myunghun SHIN
Korea Aerospace University
Keyword
Latest Issue
Copyrights notice of machine-translated contents
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Cite this
Copy
Joonghyun PARK, Myunghun SHIN, "Kink Suppression and High Reliability of Asymmetric Dual Channel Poly-Si Thin Film Transistors for High Voltage Bias Stress" in IEICE TRANSACTIONS on Electronics,
vol. E102-C, no. 1, pp. 95-98, January 2019, doi: 10.1587/transele.E102.C.95.
Abstract: Asymmetrically designed polycrystalline silicon (poly-Si) thin film transistors (TFT) were fabricated and investigated to suppress kink effect and to improve electrical reliability. Asymmetric dual channel length poly-Si TFT (ADCL) shows the best reduction of kink and leakage currents. Technology computer-aided design simulation proves that ADCL can induce properly high voltage at floating node of the TFT at high drain-source voltage (VDS), which can mitigate the impact ionization and the degradation of the transconductance of the TFT showing high reliability under the hot carrier stress.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E102.C.95/_p
Copy
@ARTICLE{e102-c_1_95,
author={Joonghyun PARK, Myunghun SHIN, },
journal={IEICE TRANSACTIONS on Electronics},
title={Kink Suppression and High Reliability of Asymmetric Dual Channel Poly-Si Thin Film Transistors for High Voltage Bias Stress},
year={2019},
volume={E102-C},
number={1},
pages={95-98},
abstract={Asymmetrically designed polycrystalline silicon (poly-Si) thin film transistors (TFT) were fabricated and investigated to suppress kink effect and to improve electrical reliability. Asymmetric dual channel length poly-Si TFT (ADCL) shows the best reduction of kink and leakage currents. Technology computer-aided design simulation proves that ADCL can induce properly high voltage at floating node of the TFT at high drain-source voltage (VDS), which can mitigate the impact ionization and the degradation of the transconductance of the TFT showing high reliability under the hot carrier stress.},
keywords={},
doi={10.1587/transele.E102.C.95},
ISSN={1745-1353},
month={January},}
Copy
TY - JOUR
TI - Kink Suppression and High Reliability of Asymmetric Dual Channel Poly-Si Thin Film Transistors for High Voltage Bias Stress
T2 - IEICE TRANSACTIONS on Electronics
SP - 95
EP - 98
AU - Joonghyun PARK
AU - Myunghun SHIN
PY - 2019
DO - 10.1587/transele.E102.C.95
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E102-C
IS - 1
JA - IEICE TRANSACTIONS on Electronics
Y1 - January 2019
AB - Asymmetrically designed polycrystalline silicon (poly-Si) thin film transistors (TFT) were fabricated and investigated to suppress kink effect and to improve electrical reliability. Asymmetric dual channel length poly-Si TFT (ADCL) shows the best reduction of kink and leakage currents. Technology computer-aided design simulation proves that ADCL can induce properly high voltage at floating node of the TFT at high drain-source voltage (VDS), which can mitigate the impact ionization and the degradation of the transconductance of the TFT showing high reliability under the hot carrier stress.
ER -
English
