Effect of High Frequency Noise Current Sources on Noise Figure for Sub-50 nm Node MOSFETs

Hiroshi SHIMOMURA; Kuniyuki KAKUSHIMA; Hiroshi IWAI

doi:10.1587/transele.E93.C.678

Effect of High Frequency Noise Current Sources on Noise Figure for Sub-50 nm Node MOSFETs

Hiroshi SHIMOMURA, Kuniyuki KAKUSHIMA, Hiroshi IWAI

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The downscaling of CMOS technology has resulted in strong improvement in RF performance of bulk and SOI MOSFETs. In order to realize a low-noise RF circuit, a deeper understanding of the noise performance for MOSFETs is required. Thermal noise is the main noise source of the CMOS device for high frequency performance, and is dominated by the drain channel noise, induced gate noise, and their correlation noise. In this work, we measured the RF noise parameter (F_min, R_n, Γ _opt) of 45 nm node MOSFETs from 5 to 15 GHz and extracted noise sources and noise coefficients P, R, and C by using an extended van der Ziel's model. We found, for the first time, that correlation coefficient C decreases from positive to negative values when the gate length is reduced continuously with the gate length of sub-100 nm. We confirmed that Pucel's noise figure model, using noise coefficients P, R, and C, can be considered a good approximation even for sub-50 nm MOSFETs. We also discussed a scaling effect of the noise coefficients, especially the correlation noise coefficient C on the minimum noise figure.

Publication: IEICE TRANSACTIONS on Electronics Vol.E93-C No.5 pp.678-684

Publication Date: 2010/05/01

Publicized

Online ISSN: 1745-1353

DOI: 10.1587/transele.E93.C.678

Type of Manuscript: PAPER

Category: Semiconductor Materials and Devices

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Hiroshi SHIMOMURA, Kuniyuki KAKUSHIMA, Hiroshi IWAI, "Effect of High Frequency Noise Current Sources on Noise Figure for Sub-50 nm Node MOSFETs" in IEICE TRANSACTIONS on Electronics, vol. E93-C, no. 5, pp. 678-684, May 2010, doi: 10.1587/transele.E93.C.678.
Abstract: The downscaling of CMOS technology has resulted in strong improvement in RF performance of bulk and SOI MOSFETs. In order to realize a low-noise RF circuit, a deeper understanding of the noise performance for MOSFETs is required. Thermal noise is the main noise source of the CMOS device for high frequency performance, and is dominated by the drain channel noise, induced gate noise, and their correlation noise. In this work, we measured the RF noise parameter (F_min, R_n, Γ _opt) of 45 nm node MOSFETs from 5 to 15 GHz and extracted noise sources and noise coefficients P, R, and C by using an extended van der Ziel's model. We found, for the first time, that correlation coefficient C decreases from positive to negative values when the gate length is reduced continuously with the gate length of sub-100 nm. We confirmed that Pucel's noise figure model, using noise coefficients P, R, and C, can be considered a good approximation even for sub-50 nm MOSFETs. We also discussed a scaling effect of the noise coefficients, especially the correlation noise coefficient C on the minimum noise figure.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E93.C.678/_p

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@ARTICLE{e93-c_5_678,
author={Hiroshi SHIMOMURA, Kuniyuki KAKUSHIMA, Hiroshi IWAI, },
journal={IEICE TRANSACTIONS on Electronics},
title={Effect of High Frequency Noise Current Sources on Noise Figure for Sub-50 nm Node MOSFETs},
year={2010},
volume={E93-C},
number={5},
pages={678-684},
abstract={The downscaling of CMOS technology has resulted in strong improvement in RF performance of bulk and SOI MOSFETs. In order to realize a low-noise RF circuit, a deeper understanding of the noise performance for MOSFETs is required. Thermal noise is the main noise source of the CMOS device for high frequency performance, and is dominated by the drain channel noise, induced gate noise, and their correlation noise. In this work, we measured the RF noise parameter (F_min, R_n, Γ _opt) of 45 nm node MOSFETs from 5 to 15 GHz and extracted noise sources and noise coefficients P, R, and C by using an extended van der Ziel's model. We found, for the first time, that correlation coefficient C decreases from positive to negative values when the gate length is reduced continuously with the gate length of sub-100 nm. We confirmed that Pucel's noise figure model, using noise coefficients P, R, and C, can be considered a good approximation even for sub-50 nm MOSFETs. We also discussed a scaling effect of the noise coefficients, especially the correlation noise coefficient C on the minimum noise figure.},
keywords={},
doi={10.1587/transele.E93.C.678},
ISSN={1745-1353},
month={May},}

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TY - JOUR
TI - Effect of High Frequency Noise Current Sources on Noise Figure for Sub-50 nm Node MOSFETs
T2 - IEICE TRANSACTIONS on Electronics
SP - 678
EP - 684
AU - Hiroshi SHIMOMURA
AU - Kuniyuki KAKUSHIMA
AU - Hiroshi IWAI
PY - 2010
DO - 10.1587/transele.E93.C.678
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E93-C
IS - 5
JA - IEICE TRANSACTIONS on Electronics
Y1 - May 2010
AB - The downscaling of CMOS technology has resulted in strong improvement in RF performance of bulk and SOI MOSFETs. In order to realize a low-noise RF circuit, a deeper understanding of the noise performance for MOSFETs is required. Thermal noise is the main noise source of the CMOS device for high frequency performance, and is dominated by the drain channel noise, induced gate noise, and their correlation noise. In this work, we measured the RF noise parameter (F_min, R_n, Γ _opt) of 45 nm node MOSFETs from 5 to 15 GHz and extracted noise sources and noise coefficients P, R, and C by using an extended van der Ziel's model. We found, for the first time, that correlation coefficient C decreases from positive to negative values when the gate length is reduced continuously with the gate length of sub-100 nm. We confirmed that Pucel's noise figure model, using noise coefficients P, R, and C, can be considered a good approximation even for sub-50 nm MOSFETs. We also discussed a scaling effect of the noise coefficients, especially the correlation noise coefficient C on the minimum noise figure.
ER -