A Signal Detection Circuit for 8b/10b 2.5 Gb/s Serial Data Communication System in 90 nm CMOS
Summary :
This paper presents a CMOS signal detection circuit for 2.5 Gb/s serial data communication system over FR-4 backplane. This overcomes characteristics deviation of full-wave rectifier-based simple power detection circuits due to data pattern and temperature by using an edge detector and a sample-hold circuit.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E93-C No.6 pp.864-866
- Publication Date
- 2010/06/01
- Publicized
- Online ISSN
- 1745-1353
- DOI
- 10.1587/transele.E93.C.864
- Type of Manuscript
- BRIEF PAPER
- Category
Authors
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Kozue SASAKI, Hiroki SATO, Akira HYOGO, Keitaro SEKINE, "A Signal Detection Circuit for 8b/10b 2.5 Gb/s Serial Data Communication System in 90 nm CMOS" in IEICE TRANSACTIONS on Electronics,
vol. E93-C, no. 6, pp. 864-866, June 2010, doi: 10.1587/transele.E93.C.864.
Abstract: This paper presents a CMOS signal detection circuit for 2.5 Gb/s serial data communication system over FR-4 backplane. This overcomes characteristics deviation of full-wave rectifier-based simple power detection circuits due to data pattern and temperature by using an edge detector and a sample-hold circuit.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E93.C.864/_p
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@ARTICLE{e93-c_6_864,
author={Kozue SASAKI, Hiroki SATO, Akira HYOGO, Keitaro SEKINE, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Signal Detection Circuit for 8b/10b 2.5 Gb/s Serial Data Communication System in 90 nm CMOS},
year={2010},
volume={E93-C},
number={6},
pages={864-866},
abstract={This paper presents a CMOS signal detection circuit for 2.5 Gb/s serial data communication system over FR-4 backplane. This overcomes characteristics deviation of full-wave rectifier-based simple power detection circuits due to data pattern and temperature by using an edge detector and a sample-hold circuit.},
keywords={},
doi={10.1587/transele.E93.C.864},
ISSN={1745-1353},
month={June},}
Copy
TY - JOUR
TI - A Signal Detection Circuit for 8b/10b 2.5 Gb/s Serial Data Communication System in 90 nm CMOS
T2 - IEICE TRANSACTIONS on Electronics
SP - 864
EP - 866
AU - Kozue SASAKI
AU - Hiroki SATO
AU - Akira HYOGO
AU - Keitaro SEKINE
PY - 2010
DO - 10.1587/transele.E93.C.864
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E93-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2010
AB - This paper presents a CMOS signal detection circuit for 2.5 Gb/s serial data communication system over FR-4 backplane. This overcomes characteristics deviation of full-wave rectifier-based simple power detection circuits due to data pattern and temperature by using an edge detector and a sample-hold circuit.
ER -
English
