Analog Pre-Distortion Linearizer Using Self Base Bias Controlled Amplifier
Summary :
An analog pre-distortion linearizer employing a radio frequency (RF) transistor with a self base bias control circuit is proposed. The self base bias control circuit extracts the envelope from the modulated input RF signal of the RF transistor and automatically controls its base current according to the extracted envelope. As a result, the proposed linearizer realizes positive gain deviation at high input power level. By adding a resistor between the RF transistor and the self base bias control circuit, the negative gain deviation can be derived. The design of the proposed lineaizer is described with taking the envelope frequency response of the self base bias control circuit into consideration. The fabricated linearizer achieves the adjacent channel power leakage ratio (ACLR) improvement of 8.1 dB for a 2 GHz-band, 10 W-class GaAs FET high-power amplifier (HPA) with negative gain deviation for W-CDMA base stations. It also achieves the ACLR improvement of 8.3 dB for a LDMOS HPA with positive gain deviation for the same application.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E93-C No.7 pp.966-974
- Publication Date
- 2010/07/01
- Publicized
- Online ISSN
- 1745-1353
- DOI
- 10.1587/transele.E93.C.966
- Type of Manuscript
- Special Section PAPER (Special Section on Recent Progress in Microwave and Millimeter-Wave Technologies)
- Category
Authors
Keyword
Latest Issue
Copyrights notice of machine-translated contents
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Cite this
Copy
Shintaro SHINJO, Kazutomi MORI, Keiki YAMADA, Noriharu SUEMATSU, Mitsuhiro SHIMOZAWA, "Analog Pre-Distortion Linearizer Using Self Base Bias Controlled Amplifier" in IEICE TRANSACTIONS on Electronics,
vol. E93-C, no. 7, pp. 966-974, July 2010, doi: 10.1587/transele.E93.C.966.
Abstract: An analog pre-distortion linearizer employing a radio frequency (RF) transistor with a self base bias control circuit is proposed. The self base bias control circuit extracts the envelope from the modulated input RF signal of the RF transistor and automatically controls its base current according to the extracted envelope. As a result, the proposed linearizer realizes positive gain deviation at high input power level. By adding a resistor between the RF transistor and the self base bias control circuit, the negative gain deviation can be derived. The design of the proposed lineaizer is described with taking the envelope frequency response of the self base bias control circuit into consideration. The fabricated linearizer achieves the adjacent channel power leakage ratio (ACLR) improvement of 8.1 dB for a 2 GHz-band, 10 W-class GaAs FET high-power amplifier (HPA) with negative gain deviation for W-CDMA base stations. It also achieves the ACLR improvement of 8.3 dB for a LDMOS HPA with positive gain deviation for the same application.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E93.C.966/_p
Copy
@ARTICLE{e93-c_7_966,
author={Shintaro SHINJO, Kazutomi MORI, Keiki YAMADA, Noriharu SUEMATSU, Mitsuhiro SHIMOZAWA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Analog Pre-Distortion Linearizer Using Self Base Bias Controlled Amplifier},
year={2010},
volume={E93-C},
number={7},
pages={966-974},
abstract={An analog pre-distortion linearizer employing a radio frequency (RF) transistor with a self base bias control circuit is proposed. The self base bias control circuit extracts the envelope from the modulated input RF signal of the RF transistor and automatically controls its base current according to the extracted envelope. As a result, the proposed linearizer realizes positive gain deviation at high input power level. By adding a resistor between the RF transistor and the self base bias control circuit, the negative gain deviation can be derived. The design of the proposed lineaizer is described with taking the envelope frequency response of the self base bias control circuit into consideration. The fabricated linearizer achieves the adjacent channel power leakage ratio (ACLR) improvement of 8.1 dB for a 2 GHz-band, 10 W-class GaAs FET high-power amplifier (HPA) with negative gain deviation for W-CDMA base stations. It also achieves the ACLR improvement of 8.3 dB for a LDMOS HPA with positive gain deviation for the same application.},
keywords={},
doi={10.1587/transele.E93.C.966},
ISSN={1745-1353},
month={July},}
Copy
TY - JOUR
TI - Analog Pre-Distortion Linearizer Using Self Base Bias Controlled Amplifier
T2 - IEICE TRANSACTIONS on Electronics
SP - 966
EP - 974
AU - Shintaro SHINJO
AU - Kazutomi MORI
AU - Keiki YAMADA
AU - Noriharu SUEMATSU
AU - Mitsuhiro SHIMOZAWA
PY - 2010
DO - 10.1587/transele.E93.C.966
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E93-C
IS - 7
JA - IEICE TRANSACTIONS on Electronics
Y1 - July 2010
AB - An analog pre-distortion linearizer employing a radio frequency (RF) transistor with a self base bias control circuit is proposed. The self base bias control circuit extracts the envelope from the modulated input RF signal of the RF transistor and automatically controls its base current according to the extracted envelope. As a result, the proposed linearizer realizes positive gain deviation at high input power level. By adding a resistor between the RF transistor and the self base bias control circuit, the negative gain deviation can be derived. The design of the proposed lineaizer is described with taking the envelope frequency response of the self base bias control circuit into consideration. The fabricated linearizer achieves the adjacent channel power leakage ratio (ACLR) improvement of 8.1 dB for a 2 GHz-band, 10 W-class GaAs FET high-power amplifier (HPA) with negative gain deviation for W-CDMA base stations. It also achieves the ACLR improvement of 8.3 dB for a LDMOS HPA with positive gain deviation for the same application.
ER -
English
