The 1-bit band-pass delta-sigma modulator (BP-DSM) achieves high resolution by using the oversampling technique. This method allows direct RF signal transmission from a digitally modulated signal, using a 1-bit digital pulse train. However, it has been previously reported that the adjacent channel leakage ratio (ACLR) in a target frequency band degrades due to the pulse transition mismatch between rising and falling waveforms in the time domain. This paper clarifies that the spurious distortion in BP-DSM is caused by the asymmetricity of the waveform about the center of an eye pattern in the time axis, and proposes a 1-bit BP-DSM with the compensator consisting of a fractional delay filter and a binary data differentiator to cancel out the asymmetry in the target frequency band. This can accurately provide a wideband cancellation signal with more than 100MHz bandwidth, including the adjacent channel, within 50dB power dynamic range. Using long term evolution (LTE) signals with 5MHz bandwidth at 0.8GHz, we simulated the spurious distortion, performing various combinations of rising and falling times in the eye pattern, and the proposed 1-bit BP-DSM always achieved high ACLR, up to 60dB, in 140MHz bandwidth, under all conditions.

In this paper, we propose a radio frequency (RF) anti-aliasing filter design method considering the effect of a roll-off characteristic on a noise figure (NF) in the direct RF undersampling receiver. The proposed method is useful for broadband reception that a system bandwidth (BW) has nearly half of the sampling frequency (1/2 fs). When the system BW is extended nearly 1/2 fs, the roll-off band is out of the desired Nyquist zone and it affects NF additionally. The proposed method offers a design target regarding the roll-off characteristic not only the rejection ratio. The target is helpful as a design guide to meet the allowed NF. We design the filter based on the proposed method and it is applied to the direct RF undersampling on-board receiver for Ka-band high throughput satellite (HTS). The measured NF value of the implemented receiver almost matched the designed value. Moreover, the receiver achieved the reception bandwidth which is 90% of 1/2 fs.

This paper presents an even harmonic quadrature mixer (EH-QMIX) with a simple filter configuration and an integrated LTCC module including LNAs, band rejection filters (BRFs), and the proposed EH-QMIX for W-CDMA direct conversion receiver (DCR). Since the DCR has no spurious responses, a BRF instead of a high-Q band pass filter can be applicable for eliminating undesired signals and it can be built in the LTCC substrates easily. As LO frequency is half of RF frequency in the EH-QMIX, diplexer can be composed of simple filters and it can be also integrated in the substrates. As a result, the whole RF circuits of the EH-DCR using a proposed EH-QMIX are integrated in the LTCC module and miniaturization of the receiver is achieved. Moreover, in order to suppress the degradation of the amplitude and the phase imbalances in the quadrature mixer caused by interferences of signals, RF characteristics of the circuits in the mixer such as reflection coefficients, isolations are discussed. A developed LTCC module shows good performances for W-CDMA direct conversion receiver.

This paper proposes a heterogeneous wireless network with handover in the application layer. The proposed network requires no upgrade of wireless infrastructure and mobile terminals to convert the present homogeneous networks to the proposed heterogeneous network. Only installing application programs on the content server side and the mobile terminal side is required. The performance of the proposed network has been evaluated in a field trial using a mobile broadband wireless access (MBWA) air interface with wide coverage and a wireless local area network (WLAN) air interface with high throughput. The field trial results show that the maximum value of the handover outage time is only 170 ms. The proposed heterogeneous wireless network is promising since both high throughput and wide coverage area are attained by a combination of the proposed handover scheme with the present homogeneous wireless networks.

A novel common emitter common collector transistor pair (CECCTP) mixer is presented. A LO pumped CECCTP enables even harmonic mixing operation, and a balanced CECCTP mixer configuration enables the suppression of both 2fLO and fIM2 which are undesirable component for direct conversion mixer. A 2 GHz-band balanced CECCTP mixer is fabricated in SiGe HBT process, and the direct conversion characteristics are measured. It performs conversion gain of 8.8 dB, NF of 14.9 dB and IIP2 of 42.3 dBm when LO power is -6 dBm, supplied voltage is 3 V and current is 5 mA.

We propose a spectrum regeneration and demodulation method for multiple direct RF undersampled real signals by using a new algorithm. Many methods have been proposed to regenerate the RF spectrum by using undersampling because of its simple circuit architecture. However, it is difficult to regenerate the spectrum from a real signal that has a band wider than a half of the sampling frequency, because it is difficult to include complex conjugate relation of the folded spectrum into the linear algebraic equation in this case. We propose a new spectrum regeneration method from direct undersampled real signals that uses multiple clocks and an extended algorithm considering the complex conjugate relation. Simulations are used to verify the potential of this method. The validity of the proposed method is verified by using the simulation data and the measured data. We also apply this algorithm to the demodulation system.

We have demonstrated the single-chip RF front-end GaAs MMIC for the Japanese Personal Handy-phone System. It has a high efficiency HPA, a T/R switch, a LNA and a low-distortion down converter mixer. The IC employs a negative voltage generator for use of single voltage DC power supply. The HPA provides an output power of 21.5 dBm, with an ACPR of 55 dBc and an efficiency of 35%. The LNA has a noise figure of 1.6 dB and a gain of 14 dB with current of 2.3 mA. The newly developed active cascode FET mixer has a high IIP3 of 1 dBm with a high conversion gain of 10 dB and low consumption current of 2.3 mA. The IC is characterized by high performance for RF front-end of PHS handheld terminals. The IC is available in a 7.0 mm6.4 mm1.1 mm plastic package.

A simplified equivalent circuit, which is useful in L-band, of switching MOSFET is presented. The MOSFET model accounts for the relatively low resistivity of Si substrate. By using this circuits, the relationship between the MOSFET equivalent circuit parameters and a series-shunt FET connected SPDT switch characteristics has been revealed. In order to evaluate the relationship mentioned above, enhancement type NMOSFETs and a SPDT switch with the FETs are fabricated. The MOSFET equivalent circuit parameters at L-band were extracted from measured small-signal S-parameters of the FETs. The measured switch characteristics are fairly good agreement with the simulated results which has been accomplished by using the MOSFET model. This good agreements shows the effectiveness of the MOSFET model which is presented here.

In this paper, we proposed low power consumption ASK transmitter based on the direct modulated oscillator at 60GHz-band. To achieve the proposed transmitter, high power-efficient oscillator and loss less modulator are designed. Moreover combined on-chip resonator and antenna to remove the buffer amplifier of the transmitter to reduce the power consumption and size. The proposed transmitter has been fabricated in standard 65nm CMOS process. The core area is 1130µm×590µm with pads. The operation frequency is 60.4GHz. The BER of 10^-6 is achieved under 50Mbps with power consumption of less than 260µW including the buffer amplifier. Using the proposed combined on-chip resonator and antenna, which need no buffer amplifier for transmitter and the power consumption is reduced to 180µW.

To reduce the complexity of direct radio frequency (RF) undersampling real-time spectrum monitoring in wireless Internet of Things (IoT) bands (920MHz, 2.4GHz, and 5 GHz bands), a design method of sampling frequencies is proposed in this paper. The Direct RF Undersampling receiver architecture enables the use of ADC with sampling clock lower frequency than receiving RF signal, but it needs RF signal identification signal processing from folded spectrums with multiple sampling clock frequencies. The proposed design method allows fewer sampling frequencies to be used than the conventional design method for continuous frequency range (D.C. to 5GHz-band). The proposed method reduced 2 sampling frequencies in wireless IoT bands case compared with the continuous range. The design result using the proposed method is verified by measurement.

We propose an architecture for a 1-bit band-pass delta-sigma modulator (BP-DSM) that outputs concurrent multiband RF signals. The proposed BP-DSM consists of parallel bandpass filters (BPFs) in the feedback loop to suppress the quantization noise at each target frequency band while maintaining the stability. Each BPF is based on second-order parallel infinite impulse response (IIR) filters. This architecture can unify and reconfigure the split BPFs according to the number of bands. The architecture complexity is proportional to the bandwidth of each RF signal and is independent of the carrier spacing between the bands. The conventional architecture of a concurrent multiband digital modulator, reported previously, has multiple input ports to the dedicated BPF at each band and so it cannot be efficiently integrated. Measurements show that the proposed architecture is feasible for transmitting a concurrent dual-band and a triple-band by changing the 1-bit digital data stream while keeping a data transmission rate of 10Gb/s. We demonstrate that the proposed architecture outputs the signal with LTE intra-band and inter-band carrier aggregation on 0.8GHz, 2.1GHz and 3.5GHz, each with 40MHz bandwidth in 120MHz aggregated bandwidth, whose bandwidth surpasses the bandwidth with carrier aggregation of LTE-A up to 100MHz. Adjacent channel leakage ratios of -49dBc and -46dBc are achieved at 3.5GHz in the concurrent dual-band and triple-band, respectively.

This paper presents an even harmonic mixer using self-biased anti-parallel diode pair (APDP). A proposed self-biased APDP is composed of a pair of diodes and self-bias series resistors. At high LO injection level, rectified current is generated by the diodes and reverse voltage is applied to the diodes by the self-bias resistor. Therefore, rapid degradation of conversion loss at high LO input level can be avoided. The effect of self-bias resistor is explained by using simplified behavior model and harmonic balance method, and is evaluated by the measurements of an L-band even harmonic type direct conversion mixer.

RF under sampling is more suitable for Satellite receiver systems in comparison to terrestrial systems. In conventional RF under sampling the minimum sampling frequency (fs) should be atleast twice the system bandwidth; therefore for a system with a wide bandwidth, a relatively high fs is necessary. In this paper we propose a direct RF under sampling reception method that halves fs. The proposed f's is achieved by folding in band noise in half. A method of adapting f's for the reception of signals in different channels is also proposed; this ensures that the SNR is not degraded for any channel. To evaluate the proposed technique's performance and compare it to the conventional case a 3 channel, 1 GHz band test receiver and it's key device (i.e. S/H circuit) are developed. Using SNR and EVM as performance indexes, the performance of the proposed technique has been evaluated and compared to that of the conventional technique. The evaluation results show that the proposed technique can achieve the same performance as conventional RF under sampling for all 3 channels, using only half of the sampling frequency of the conventional technique.

An analog pre-distortion linearizer employing a radio frequency (RF) transistor with a self base bias control circuit is proposed. The self base bias control circuit extracts the envelope from the modulated input RF signal of the RF transistor and automatically controls its base current according to the extracted envelope. As a result, the proposed linearizer realizes positive gain deviation at high input power level. By adding a resistor between the RF transistor and the self base bias control circuit, the negative gain deviation can be derived. The design of the proposed lineaizer is described with taking the envelope frequency response of the self base bias control circuit into consideration. The fabricated linearizer achieves the adjacent channel power leakage ratio (ACLR) improvement of 8.1 dB for a 2 GHz-band, 10 W-class GaAs FET high-power amplifier (HPA) with negative gain deviation for W-CDMA base stations. It also achieves the ACLR improvement of 8.3 dB for a LDMOS HPA with positive gain deviation for the same application.

An even harmonic quadrature mixer (EH-QMIX) with a balanced configuration is proposed for a direct conversion receiver. The unit even harmonic mixer (EHMIX) used for I/Q paths consists of two anti parallel diode pairs (APDPs) and a pair of diplexers. When the second harmonic of LO (2LO) from the LO section is applied to the LO port as a spurious component, a conventional single-ended EHMIX using APDP converts the 2LO leakage from the LO section into the baseband and the d.c. offset and the self-detected LO noise arise at the baseband degrade the sensitivity. This proposed balanced EHMIX configuration can cancel out the 2LO leakage in itself. Therefore, the d.c. offset and the LO noise are significantly suppressed and the degradation of the sensitivity can be avoided. The suppression characteristic of the d.c. offset and the LO noise are verified by the simulation and the measurements. By using this balanced configuration, the fabricated EH-QMIX achieves wider frequency band characteristic than that of the single-ended EH-QMIX, and it shows 20% relative bandwidth at L-band.

An L-band low quiescent current and low distortion SiGe heterojunction bipolar transistor (HBT) driver amplifier having a self base bias control circuit is described. Since the size of this bias circuit is small and it does not need an external control circuit, it is easy to be integrated with the driver amplifier on a single chip. According to the output power level, the self base bias control circuit, which is the combination of a constant base voltage circuit and p-metal oxide semiconductor (MOS) FET current mirror with a constant current source, automatically controls the base voltage, and allows low quiescent current at low output power level and low distortion at high output power level. The simulated results show that the driver amplifier having the self base bias control circuit achieves 1 dB power compression point (P1 dB) improvement of 2.4 dB compared with the driver amplifier having a conventional constant base voltage under the same quiescent current condition. The fabricated driver amplifier with the proposed bias circuit shows high P1 dB of 15.0 dBm with low quiescent current of 15.3 mA.

This paper presents a theoretical analysis and experimental confirmation of a tunable ring resonator that can independently change its resonant frequency and bandwidth. The tunable ring resonator comprises a ring resonator, three tunable capacitors, and switches. The resonant frequency changes according to the capacitance of tunable capacitors, and the bandwidth varies by changing the state of the switches. The unique feature of the resonator is that the resonant frequency remains steady when the bandwidth is changed. The fundamental characteristics are shown based on linear circuit simulation and electromagnetic simulation results. The resonator is fabricated using GaAs FET single-pole single-throw switches. The fabricated resonator changes the resonant frequency from 1.5 GHz to 2.0 GHz and the fractional bandwidth from 5% to 30%.

In this paper, we propose a direct digital RF transmitter with a 1-bit band-pass delta-sigma modulator (BP-DSM) that uses high order image components of the 7th Nyquist zone in Manchester coding for microwave and milimeter wave application. Compared to the conventional non-return-to-zero (NRZ) coding, in which the high order image components of 1-bit BP-DSM attenuate severely in the form of sinc function, the proposed 1-bit direct digital RF transmitter in Manchester code can improve the output power and signal-to-noise ratio (SNR) of the image components at specific (4n-1)th and (4n-2)th Nyquist Zone, which is confirmed by calculating of the power spectral density. Measurements are made to compare three types of 1-bit digital-to-analog converter (DAC) signal in output power and SNR; NRZ, 50% duty return-to-zero (RZ) and Manchester coding. By using 1 Vpp/8Gbps DAC output, 1-bit signals in Manchester coding show the highest output power of -20.3dBm and SNR of 40.3dB at 7th Nyquist Zone (26GHz) in CW condition. As a result, compared to NRZ and RZ coding, at 7th Nyquist zone, the output power is improved by 8.1dB and 6dB, respectively. Meanwhile, the SNR is improved by 7.6dB and 4.9dB, respectively. In 5Mbps-QPSK condition, 1-bit signals in Manchester code show the lowest error vector magnitude (EVM) of 2.4% and the highest adjacent channel leakage ratio (ACLR) of 38.2dB with the highest output power of -18.5dBm at 7th Nyquist Zone (26GHz), respectively, compared to the NRZ and 50% duty RZ coding. The measurement and simulation results of the image component of 1-bit signals at 7th Nyquist Zone (26GHz) are consistent with the calculation results.

In this paper, we propose a novel baseband (BB) phase shifter (PS) using a fixed-gain-amplifier (FGA) matrix. The proposed BB PS consists of 5 stages of a vector synthesis type FGA matrix with in-phase/quadrature-phase (I/Q) input/output interfaces. In order to achieve low gain variation between phase shift states, 3rd to 5th stages are designed to have a phase shift of +φi and -φi (i=3,4,5). To change between +φi and -φi phase shift states, two FGAs with DC bias in-phase/out-phase switches are used. The two FGAs have the same gain, therefore ideally no gain variation can be achieved. Using this configuration, phase shift error and gain variation caused by process mismatch and temperature variation can be reduced. Fabricated 5-bit BB PS has 3-dB bandwidth of 1.05GHz, root-mean-square (rms) phase errors lower than 2.2°, rms gain variations lower than 0.42dB. Power consumption of the PS core and output buffer are 4.9mW and 14.3mW, respectively. 1-dB compression output power is -12.5dBm. The fabricated PS shows that the total phase shift error and gain variation are within the required accuracy of a 5-bit PS with no requirement of calibration.

A 0.4-5.8 GHz SiGe-MMIC quadrature modulator (Q-MOD) employing a self current controlled mixer for cognitive radio is described. The self current controlled mixer consists of a Gilbert cell mixer and a self current control circuit which is composed of both a current feedback circuit and an output buffer amplifier. The self current control circuit automatically controls the mixer current according to the output power level, and improves the linearity over wide radio frequency (RF) range. Simulation results show that the proposed Q-MOD realizes 1 dB compression point (P1 dB) improvement of more than 3.0 dB compared to the conventional Q-MOD at the frequencies of 0.4, 0.8, 1.95, 5.2 and 5.8 GHz. The fabricated Q-MOD achieves P1 dB improvement of more than 2.8 dB under the same condition. It also improves the output power with error vector magnitude (EVM) of 3.0% (Pout@EVM=3.0%), and achieves the Pout improvement of more than 2.7 dB under the modulation conditions of UHF wireless system (OFDM/16QAM, 0.4 GHz), W-CDMA (HPSK/QPSK, 0.8 GHz/1.95 GHz) and wireless-LAN (OFDM/64QAM, 5.2 GHz/5.8 GHz).