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[Author] Tatsuhiko IKEDA(2hit)

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  • Si-Substrate Modeling toward Substrate-Aware Interconnect Resistance and Inductance Extraction in SoC Design

    Toshiki KANAMOTO  Tatsuhiko IKEDA  Akira TSUCHIYA  Hidetoshi ONODERA  Masanori HASHIMOTO  

     
    PAPER-Interconnect

      Vol:
    E89-A No:12
      Page(s):
    3560-3568

    This paper proposes a simple yet sufficient Si-substrate modeling for interconnect resistance and inductance extraction. The proposed modeling expresses Si-substrate as four filaments in a filament-based extractor. Although the number of filaments is small, extracted loop inductances and resistances show accurate frequency dependence resulting from the proximity effect. We experimentally prove the accuracy using FEM (Finite Element Method) based simulations of electromagnetic fields. We also show a method to determine optimal size of the four filaments. The proposed model realizes substrate-aware extraction in SoC design flow.

  • L-Band SPDT Switch Using Si-MOSFET

    Yoshitada IYAMA  Noriharu SUEMATSU  Tomonori SHIGEMATSU  Takao MORIWAKI  Tatsuhiko IKEDA  

     
    PAPER-Active Devices

      Vol:
    E79-C No:5
      Page(s):
    636-643

    A simplified equivalent circuit, which is useful in L-band, of switching MOSFET is presented. The MOSFET model accounts for the relatively low resistivity of Si substrate. By using this circuits, the relationship between the MOSFET equivalent circuit parameters and a series-shunt FET connected SPDT switch characteristics has been revealed. In order to evaluate the relationship mentioned above, enhancement type NMOSFETs and a SPDT switch with the FETs are fabricated. The MOSFET equivalent circuit parameters at L-band were extracted from measured small-signal S-parameters of the FETs. The measured switch characteristics are fairly good agreement with the simulated results which has been accomplished by using the MOSFET model. This good agreements shows the effectiveness of the MOSFET model which is presented here.