An asynchronous spread spectrum (SS) wireless modem has been implemented using an efficient ZnO-SiO2-Si surface acoustic wave (SAW) convolver. The modem is based on a direct-sequence/frequency-shift-keying (DS/FSK) method for the modulation. The demodulation is carried out asynchronously utilizing the coherent correlation characteristics of the SAW convolver. In order to improve the narrowband interference rejection capability, we propose a new technique based on the reference signal control. A notched-reference-signal circuit and a self-convolution canceler are implemented in the SS modem for the reference signal control. It was found that the antijam capability for narrowband interference is at least -24dB of desired-to-undesired power ratio (D/U); the improvement of the antijam capability is 16dB up as compared with our previous SS modem.

This paper proposes a heterogeneous wireless network with handover in the application layer. The proposed network requires no upgrade of wireless infrastructure and mobile terminals to convert the present homogeneous networks to the proposed heterogeneous network. Only installing application programs on the content server side and the mobile terminal side is required. The performance of the proposed network has been evaluated in a field trial using a mobile broadband wireless access (MBWA) air interface with wide coverage and a wireless local area network (WLAN) air interface with high throughput. The field trial results show that the maximum value of the handover outage time is only 170 ms. The proposed heterogeneous wireless network is promising since both high throughput and wide coverage area are attained by a combination of the proposed handover scheme with the present homogeneous wireless networks.

We have proposed a current-cut switched-current matched filter (CC-SIMF) for direct-sequence code-division multiple-access (DS-CDMA). The 256-chip CC-SIMF can achieve low power consumption of less than 10 mW under high-speed operation of more than 16 Mcps. To reduce the current transfer error accumulation, we propose a parallel SIMF configuration. A 128-chip SIMF using 0.8-µm Complementally Metal Oxide Semiconductor (CMOS) process has been designed and fabricated. Optimization of the current memory cell structure has been described. The correlation operation at 16 Mcps has been obtained using a 128-chip orthogonal m-sequence. The code phase separation performance for path diversity has been clearly observed. The power consumption has been significantly reduced using the current-cut method.

The self-timed pipeline (STP) is one of the most promising VLSI/SoC architectures. It achieves efficient utilization of tens of billions of transistors, consumes ultra low power, and is easy-to-design because of its signal integrity and low electro-magnetic interference. These basic features of the STP have been proven by the development of self-timed data-driven multimedia processors, DDMP's. This paper proposes a novel scheme of interacting self-timed (clockless) pipelines by which the various distributed and interconnected pipelines can achieve highly functional stream processing in future giga-transistor chips. The paper also proposes a set of elementary coupling control modules that facilitate various combinations of flow-thru processing between pipelines, and then discusses the practicality of the proposed scheme through the LSI design of application modules such as a priority-based queue, a mutual interconnection network, and a pipelined sorter.

RF under sampling is more suitable for Satellite receiver systems in comparison to terrestrial systems. In conventional RF under sampling the minimum sampling frequency (fs) should be atleast twice the system bandwidth; therefore for a system with a wide bandwidth, a relatively high fs is necessary. In this paper we propose a direct RF under sampling reception method that halves fs. The proposed f's is achieved by folding in band noise in half. A method of adapting f's for the reception of signals in different channels is also proposed; this ensures that the SNR is not degraded for any channel. To evaluate the proposed technique's performance and compare it to the conventional case a 3 channel, 1 GHz band test receiver and it's key device (i.e. S/H circuit) are developed. Using SNR and EVM as performance indexes, the performance of the proposed technique has been evaluated and compared to that of the conventional technique. The evaluation results show that the proposed technique can achieve the same performance as conventional RF under sampling for all 3 channels, using only half of the sampling frequency of the conventional technique.

In this paper, we propose a novel baseband (BB) phase shifter (PS) using a fixed-gain-amplifier (FGA) matrix. The proposed BB PS consists of 5 stages of a vector synthesis type FGA matrix with in-phase/quadrature-phase (I/Q) input/output interfaces. In order to achieve low gain variation between phase shift states, 3rd to 5th stages are designed to have a phase shift of +φi and -φi (i=3,4,5). To change between +φi and -φi phase shift states, two FGAs with DC bias in-phase/out-phase switches are used. The two FGAs have the same gain, therefore ideally no gain variation can be achieved. Using this configuration, phase shift error and gain variation caused by process mismatch and temperature variation can be reduced. Fabricated 5-bit BB PS has 3-dB bandwidth of 1.05GHz, root-mean-square (rms) phase errors lower than 2.2°, rms gain variations lower than 0.42dB. Power consumption of the PS core and output buffer are 4.9mW and 14.3mW, respectively. 1-dB compression output power is -12.5dBm. The fabricated PS shows that the total phase shift error and gain variation are within the required accuracy of a 5-bit PS with no requirement of calibration.

This paper describes downlink throughput performances measured in a mobile broadband wireless access (MBWA) system field trial with Fast Low-latency Access with Seamless Handoff Orthogonal Frequency Division Multiplexing (FLASH-OFDM). The field trial results show that the downlink cell sizes are 0.4 km2, 0.6 km2, and 1.7 km2 when the sector antenna heights are 19 m, 58 m, and 84 m, respectively, assuming the following items. (1) The cell shape is circular. (2) The cell edge is defined as the location where the average downlink throughput is 1.5 Mbit/s.

In the present GHz-clock high-density LSI, a design of signal lines is getting so critical that the transmission line analysis should be introduced to signal line design. This leads to the complex design of line structure and i/o drivers including impedance matching. Our target is to implement a system-in-package (SiP) for software-defined-radio (SDR). The SiP operates up to 10 GHz, and requires a compact and high-density packaging technology with a simple signal wiring design. In this paper, we propose a new concept of 3-D multilayer-stacked SiP. The new 3-D packaging concept includes (1) design guideline for interconnection lengths, (2) bridging register circuits in LSI chips, (3) flip-chip microbump bonding technology of chips onto system-buildup printed wiring boards (PWB), (4) multilayer-stacked 3-D package of several sets of chips and PWB, and (5) 100-µm-diameter bumps at peripheral region of PWB as vertical via-bump bus lines. A critical interconnect length, in which interconnect wiring is treated as a conventional RC line, is discussed for wiring design. Both wiring lengths in LSI chips and that among chips corresponding to total thickness of vertical bus lines are designed to be shorter than the critical length. The key points of the 3-D package for GHz signal transfer are a delay guarantee due to limitation of line length and separation between local lines in a chip and a bus line among chips.

Low-temperature MOSFET is a promising device for future high-speed VLSI. We have developed a three-dimensional device simulator which can be used for the analysis of low-temperature deep-submicron MOSFET's. In order to improve the convergence property, the method of physical limiting on increment (PLI) was suggested. Two types of PLI, i.e., the limiting on potential increment (LPI) and the limiting on carrie-concentration increment (LCI) were showed to be very simple and effective methods for both 300 K and 77 K. Using the simulated results of COLD3, we showed the threshold variation in a low-temperature MOSFET due to the narrow channel effect can be suppressed if the device is designed according to the temperature scaling law.

We have proposed and implemented a spread spectrum (SS) wireless switch using 2.4 GHz front-end AlN/Al2O3 surface acoustic wave (SAW) matched filter (MF). Since the SAW MF has radio frequency (RF) front-end operation, RF components are not needed in the received circuit. High impedance in the peripheral circuit using passive devices has been employed for low current consumption. The SS wireless switches have been designed with the power consumption of less than 100 µW by using the SAW MF. It is confirmed that implemented SS wireless switch has a long battery life of 10 years and communication range of 30 m.

We have proposed the packet SS-CDMA scheme for downlink of SS-CDMA flexible wireless cellular network. Transmission packet is framed with synchronization block with 11 chip Barker code and information block with orthogonal spreading code. The chip synchronization is carried out using short code surface acoustic wave (SAW) matched filter. The code de-spreading is carried out using in-line de-spreader. Multi-channel downlink of 63 channels can be designed using orthogonal m-sequence. Simulation results show more than 15 channels without degradation from theoretical value can be used under multi-path environment. The packet SS-CDMA modem has been implemented using a 2.4 GHz front-end SAW matched filter. Degradation of Eb/N0 of less than 0.5 dB is experimentally achieved with four-channel multiplex.

In order to realize millimeter-wave (MMW) 3-D system-in-package (SiP) front-end modules, we propose a 60-GHz band copper ball vertical interconnection structure, which interconnects between vertically stacked substrates. The structure enables ICs to be placed between the vertically stacked substrates. Since the diameter of the copper balls must exceed the thickness of the ICs, the distance between the substrates in the modules is larger than that of the flip-chip interconnection widely used in the MMW-band. Therefore, the conventional flip-chip interconnection does not scale for the interconnection between the substrates in MMW 3-D SiP front-end modules. The layout of grounded copper balls and the patterns of inner ground layers in the upper/lower substrates are designed using 3-D electromagnetic field simulation. The designed structure allows less than 1 dB transmission loss up to 71.1 GHz, compared with a through transmission line. The result is verified with fabrication and measurement and confirms the feasibility of MMW 3-D SiP front-end modules.

A low cost, ultra small Radio Frequency (RF) transceiver module with integrated antenna is one of the key technologies for short range millimeter-wave wireless communication. This paper describes a 60 GHz-band transmitter module with integrated dipole antenna. The module consists of three pieces of low-cost organic resin substrate. These substrates are vertically stacked by employing Cu ball bonding 3-dimensional (3-D) system-in-package (SiP) technology and the MMIC's are mounted on each organic substrates by using Au-stud bump bonding (SBB) technique. The planer dipole antenna is fabricated on the top of the stacked organic substrate to avoid the influence of the grounding metal on the base substrate. At 63 GHz, maximum actual gain of 6.0 dBi is obtained for fabricated planar dipole antenna. The measured radiation patterns are agreed with the electro-magnetic (EM) simulated result, therefore the other RF portion of the 3-D front-end module, such as flip chip mounted IC's on the top surface of the module, does not affect the antenna characteristics. The results show the feasibility of millimeter-wave low cost, ultra small antenna integrated module using stacked organic substrates.

In this paper, a fully integrated 5 GHz voltage controlled oscillator (VCO) is presented. The VCO is designed with 0.18 µm silicon complementary metal oxide semiconductor (Si-CMOS) process. To achieve low phase noise, a novel varactors pair circuit is proposed to cancel effects of capacitance fluctuation that makes harmonic currents which increase phase noise of VCO. The VCO with the proposed varactor circuit has tuning range from 5.1 GHz to 6.1 GHz (relative value of 17.9%) and phase noise of lower than -110.8 dBc/Hz at 1 MHz offset over the full tuning range. Figure-of-merit-with-tuning-range (FOMT) of the proposed VCO is -182 dBc/Hz.

We have proposed an intracell uplink of a spread-spectrum code-division multiple-access (SS-CDMA) flexible wireless network based on approximately synchronized (AS) CDMA. Since the AS-CDMA has no co-channel interference, complicated transmission power control (TPC) is not required. A modem of the AS-CDMA has been designed and implemented for the Japanese 2.4 GHz industrial, scientific and medical (ISM) band. Using the implemented modem, the degradation of Eb/N0 from the theoretical limit is 1.0 dB at a bit error rate (BER) of 10-3. Under 2-user environment, the degradation of carrier-to-noise ratio (CNR) is 0.5 dB at a BER of 10-3 when the desired-to-undesired signal ratio (DUR) is -20.3 dB. We have evaluated BER performances in cases of varying carrier frequency offset and median DUR with computer simulation. Under 8-user environment, at the carrier frequency offset of 0.3 ppm, the BER with the DUR of -16 dB is found to be 10-3. Using the AS-CDMA with a 4-step open-loop TPC technique, the design of intracell uplink is available.

An asynchronous spread spectrum (SS) modem for 2.4-GHz wireless LAN has been implemented using an efficient ZnO-SiO2-Si surface acoustic wave (SAW) convolver. The design of the highly efficient SAW convolver was developed at Tohoku University and commercially manufactured by Clarion Co., Japan. The modem can operate under full-duplex transmission in the same frequency range of the 2.4-GHz SS band. The SS modem is based on a direct-sequence/code-shift-keying (DS/CSK) method for the modulation. Pseudo-noise (PN) codes are chosen from a preferred pair of 127-chip m-sequences and the code rate is 14MHz. The asynchronous demodulation is simply realized utilizing the coherent correlation characteristics of the SAW convolver. Under full-duplex transmission, the self-jamming caused by a transmitted signal in the modem itself is effectively reduced by an RF isolator and the SS processing gain. The implemented modem has been tested using a coaxial cable with attenuator. A bit error rate of 10-6 under full-duplex transmission is observed at 78.3dB of a desired to undesired signal ratio. The effective range is estimated on the basis of two-path propagation model. From self-jamming rejection of 78.3dB, the effective range under real-time full-duplex is estimated to be about 200m.