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[Author] Shintaro SHINJO(11hit)

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  • A Compact RF Frontend Module of Active Phased Array Antenna for High SHF Wideband Massive MIMO in 5G Open Access

    Hideyuki NAKAMIZO  Shintaro SHINJO  Koji TSUTSUMI  Satoshi YAMAGUCHI  Hideharu YOSHIOKA  Akihiro OKAZAKI  Akinori TAIRA  Kenichi TAJIMA  

     
    INVITED PAPER

      Vol:
    E100-C No:10
      Page(s):
    818-824

    In order to meet various requirements for the 5th generation mobile communication, a high SHF wideband massive-MIMO system has been widely studied which offers wide system bandwidth and high spectral efficiency. A hybrid beamforming configuration which combines analog beamforming by APAA (Active Phased Array Antenna) and digital MIMO signal processing is one of the promising approaches for reducing the complexity and power consumption of the high SHF wideband massive-MIMO system. In order to realize the hybrid beamforming configuration in high SHF band, small size, low power consumption and precise beam forming over the wide-band frequency range are strongly required for RF frontend which constitutes analog beam former. In this paper, a compact RF frontend module for high SHF wideband 5G small cell base station is proposed. This RF frontend module is prototyped. Various key components of the RF frontend module are fabricated in 15GHz band, and measured results show that high RF performances are able to meet the requirements of RF frontend.

  • X-Band GaN Chipsets for Cost-Effective 20W T/R Modules Open Access

    Jun KAMIOKA  Yoshifumi KAWAMURA  Ryota KOMARU  Masatake HANGAI  Yoshitaka KAMO  Tetsuo KODERA  Shintaro SHINJO  

     
    PAPER-Electronic Circuits

      Pubricized:
    2021/12/10
      Vol:
    E105-C No:5
      Page(s):
    194-202

    This paper reports on X-band Gallium Nitride (GaN) chipsets for cost-effective 20W transmit-receive (T/R) modules. The chipset components include a GaN-on-Si monolithic microwave integrated circuit (MMIC) driver amplifier (DA), a GaN-on-SiC high power amplifier (HPA) with GaAs matching circuits, a high-gain GaN-on-Si HPA with a GaAs output matching circuit, and a GaN-on-Si MMIC switch (SW). By utilizing either combination of the DA or single high-gain HPA, the configurations of two T/R module types can be realized. The GaN-on-Si MMIC DA demonstrates an output power of 6.4-7.4W, an associate gain of 22.3-24.6dB and a power added efficiency (PAE) of 32-36% over 9.0-11.0GHz. A GaN-on-SiC HPA with GaAs matching circuits exhibited an output power of 20-28W, associate gain of 7.8-10.7dB, and a PAE of 40-56% over 9.0-11.0GHz. The high-gain GaN-on-Si HPA with a GaAs output matching circuit exhibits an output power of 15-30W, associate gain of 27-30dB, and PAE of 26-33% over 9.0-11.0GHz. The GaN-on-Si MMIC switch demonstrates insertion losses of 1.1-1.3dB and isolation of 10.1-14.7dB over 8.0-11.5GHz. By employing cost-effective circuit configurations, the costs of these chipsets are estimated to be about half that of conventional chipsets.

  • GaN Amplifiers of Selectable Output Power Function with Semi-Custom Matching Networks

    Yutaro YAMAGUCHI  Masatake HANGAI  Shintaro SHINJO  Takaaki YOSHIOKA  Naoki KOSAKA  

     
    PAPER

      Vol:
    E102-C No:10
      Page(s):
    682-690

    A methodology for obtaining semi-custom high-power amplifiers (HPAs) is described. The semi-custom concept pertains to the notion that a selectable output power is attainable by replacing only transistors. To compensate for the mismatch loss, a new output matching network that can be easily tuned by wiring is proposed. Design equations were derived to determine the circuit parameters and specify the bandwidth limitations. To verify this methodology, a semi-custom HPA with GaN HEMTs was fabricated in the S-band. A selectable output power from 240 to 150 W was successfully achieved while maintaining a PAE of over 50% in a 19% relative bandwidth.

  • Analog Pre-Distortion Linearizer Using Self Base Bias Controlled Amplifier

    Shintaro SHINJO  Kazutomi MORI  Keiki YAMADA  Noriharu SUEMATSU  Mitsuhiro SHIMOZAWA  

     
    PAPER

      Vol:
    E93-C No:7
      Page(s):
    966-974

    An analog pre-distortion linearizer employing a radio frequency (RF) transistor with a self base bias control circuit is proposed. The self base bias control circuit extracts the envelope from the modulated input RF signal of the RF transistor and automatically controls its base current according to the extracted envelope. As a result, the proposed linearizer realizes positive gain deviation at high input power level. By adding a resistor between the RF transistor and the self base bias control circuit, the negative gain deviation can be derived. The design of the proposed lineaizer is described with taking the envelope frequency response of the self base bias control circuit into consideration. The fabricated linearizer achieves the adjacent channel power leakage ratio (ACLR) improvement of 8.1 dB for a 2 GHz-band, 10 W-class GaAs FET high-power amplifier (HPA) with negative gain deviation for W-CDMA base stations. It also achieves the ACLR improvement of 8.3 dB for a LDMOS HPA with positive gain deviation for the same application.

  • 120-W Ku-Band GaN SSPA with Diode Linearizer for Future Broadcasting Satellites Open Access

    Masafumi NAGASAKA  Masaaki KOJIMA  Takuma TORII  Hiromitsu UTSUMI  Koji YAMANAKA  Shintaro SHINJO  Mitsuhiro SHIMOZAWA  Hisashi SUJIKAI  

     
    PAPER

      Vol:
    E102-C No:10
      Page(s):
    717-724

    Satellite broadcasting of 4K/8K ultra-high definition television (UHDTV) was launched in Japan in December 2018. Because this system uses the amplitude and phase shift keying (APSK) modulation scheme, there is a need to improve the non-linear characteristics of the satellite transponders. To meet this requirement, we have been developing a 120-W-class Ku-band solid state power amplifier (SSPA) as a replacement for the currently used traveling wave tube amplifier (TWTA). In this study, we developed a gallium-nitride (GaN) SSPA and linearizer (LNZ). The SSPA achieved an output power of 120W while maintaining a power added efficiency (PAE) of 31%. We evaluated the transmission performance of 16APSK in this SSPA channel in comparison with that in the TWTA channel.

  • An L-Band High Efficiency and Low Distortion Multi-Stage Amplifier Using Self Phase Distortion Compensation Technique

    Yukio IKEDA  Kazutomi MORI  Shintaro SHINJO  Fumimasa KITABAYASHI  Akira OHTA  Tadashi TAKAGI  Osami ISHIDA  

     
    PAPER

      Vol:
    E85-C No:12
      Page(s):
    1967-1972

    An L-Band high efficiency and low distortion multi-stage amplifier using self phase distortion compensation technique is presented. In this amplifier, the bias condition of the driver-stage transistor is tuned to compensate the phase distortion of the power-stage transistor, and the load and source impedances of the driver-stage and power-stage transistors are optimized to achieve the maximum efficiency with a specified adjacent channel leakage power (ACP) for multi-stage amplifier. The developed amplifier achieves a power added efficiency (Eadd) of 42.8% and an output power (Pout) of 26.8 dBm with an ACP of -38 dBc at 1.95 GHz for wide-band code-division multiple-access (W-CDMA) cellular phones.

  • Low Quiescent Current SiGe HBT Driver Amplifier Having Self Base Bias Control Circuit

    Shintaro SHINJO  Kazutomi MORI  Hiroyuki JOBA  Noriharu SUEMATSU  Tadashi TAKAGI  

     
    PAPER

      Vol:
    E85-C No:7
      Page(s):
    1404-1411

    An L-band low quiescent current and low distortion SiGe heterojunction bipolar transistor (HBT) driver amplifier having a self base bias control circuit is described. Since the size of this bias circuit is small and it does not need an external control circuit, it is easy to be integrated with the driver amplifier on a single chip. According to the output power level, the self base bias control circuit, which is the combination of a constant base voltage circuit and p-metal oxide semiconductor (MOS) FET current mirror with a constant current source, automatically controls the base voltage, and allows low quiescent current at low output power level and low distortion at high output power level. The simulated results show that the driver amplifier having the self base bias control circuit achieves 1 dB power compression point (P1 dB) improvement of 2.4 dB compared with the driver amplifier having a conventional constant base voltage under the same quiescent current condition. The fabricated driver amplifier with the proposed bias circuit shows high P1 dB of 15.0 dBm with low quiescent current of 15.3 mA.

  • Overview and Prospects of High Power Amplifier Technology Trend for 5G and beyond 5G Base Stations Open Access

    Koji YAMANAKA  Shintaro SHINJO  Yuji KOMATSUZAKI  Shuichi SAKATA  Keigo NAKATANI  Yutaro YAMAGUCHI  

     
    INVITED PAPER

      Pubricized:
    2021/05/13
      Vol:
    E104-C No:10
      Page(s):
    526-533

    High power amplifier technologies for base transceiver stations (BTSs) for the 5th generation (5G) mobile communication systems and so-called beyond 5G (B5G) systems are reviewed. For sub-6, which is categorized into frequency range 1 (FR1) in 5G, wideband Doherty amplifiers are introduced, and a multi-band load modulation amplifier, an envelope tracking amplifier, and a digital power amplifier for B5G are explained. For millimeter wave 5G, which is categorized into frequency range 2 (FR2), GaAs and GaN MMICs operating at around 28GHz are introduced. Finally, future prospect for THz GaN devices is described.

  • 0.4-5.8 GHz SiGe-MMIC Quadrature Modulator Employing Self Current Controlled Mixer for Cognitive Radio

    Shintaro SHINJO  Fumiki ONOMA  Koji TSUTSUMI  Noriharu SUEMATSU  Mitsuhiro SHIMOZAWA  Hiroshi HARADA  

     
    PAPER-Wideband RF Systems

      Vol:
    E92-B No:12
      Page(s):
    3701-3710

    A 0.4-5.8 GHz SiGe-MMIC quadrature modulator (Q-MOD) employing a self current controlled mixer for cognitive radio is described. The self current controlled mixer consists of a Gilbert cell mixer and a self current control circuit which is composed of both a current feedback circuit and an output buffer amplifier. The self current control circuit automatically controls the mixer current according to the output power level, and improves the linearity over wide radio frequency (RF) range. Simulation results show that the proposed Q-MOD realizes 1 dB compression point (P1 dB) improvement of more than 3.0 dB compared to the conventional Q-MOD at the frequencies of 0.4, 0.8, 1.95, 5.2 and 5.8 GHz. The fabricated Q-MOD achieves P1 dB improvement of more than 2.8 dB under the same condition. It also improves the output power with error vector magnitude (EVM) of 3.0% (Pout@EVM=3.0%), and achieves the Pout improvement of more than 2.7 dB under the modulation conditions of UHF wireless system (OFDM/16QAM, 0.4 GHz), W-CDMA (HPSK/QPSK, 0.8 GHz/1.95 GHz) and wireless-LAN (OFDM/64QAM, 5.2 GHz/5.8 GHz).

  • A Low Quiescent Current CV/CC Parallel Operation HBT Power Amplifier for W-CDMA Terminals

    Shintaro SHINJO  Kazutomi MORI  Hiro-omi UEDA  Akira OHTA  Hiroaki SEKI  Noriharu SUEMATSU  Tadashi TAKAGI  

     
    PAPER

      Vol:
    E86-C No:8
      Page(s):
    1444-1450

    A constant voltage/constant current (CV/CC) parallel operation heterojunction bipolar transistor (HBT) power amplifier (PA) configuration is presented, and its design method is described. A resistor base feed (CC mode) HBT is connected to an inductor base feed (CV mode) HBT in parallel, and compensates the gain expansion of the CV mode HBT due to near class-B operation. By adding CC mode HBT, the total quiescent current can be decreased from 32 mA to 23 mA with adjacent channel leakage power ratio (ACPR) < -40.0 dBc. At the maximum output power region, the fabricated PA achieves output power (Pout) of 26.8 dBm and power added efficiency (PAE) of 42.0% with ACPR of -40.0 dBc, and shows the comparable performances with a conventional PA using CV mode HBT.

  • On-Chip Temperature Compensation Active Bias Circuit Having Tunable Temperature Slope for GaAs FET MMIC PA

    Shintaro SHINJO  Kazutomi MORI  Tomokazu OGOMI  Yoshihiro TSUKAHARA  Mitsuhiro SHIMOZAWA  

     
    PAPER-Active Devices and Circuits

      Vol:
    E94-C No:10
      Page(s):
    1498-1507

    An on-chip temperature compensation active bias circuit having tunable temperature slope has been proposed, and its application to an X-band GaAs FET monolithic microwave integrated circuit (MMIC) power amplifier (PA) is described. The proposed bias circuit can adjust the temperature slope of gate voltage according to the bias condition of the PA, and also realizes the higher temperature slope of the gate voltage by employing the diode and the FET which operates at near threshold voltage (Vt) in the bias circuit. As a result, the gain of PAs operated at any bias conditions is kept almost constant against temperature by applying the proposed bias circuit. Moreover, the proposed bias circuit can be integrated in the same chip with the MMIC PA since it does not need off-chip components, and operates with only negative voltage source. The fabricated results of the on-chip temperature compensation active bias circuit shows that the temperature slope of the gate voltage varies from 2.1 to 6.3 mV/, which is enough to compensate the gain of not only class-B PA but also class-A PA. The gain deviation of the developed GaAs FET MMIC PA with the proposed bias circuit has been reduced from 3.3 dB to 0.6 dB in the temperature range of 100.