This paper presents a new low-dropout (LDO) regulator with low-quiescent, high-drive and fast-transient performance. This is based on a new composite power transistor composed of a shunt feedback class-AB embedded gain stage and the application of dynamic-biasing schemes to both the error amplifier as well as the composite power transistor. The proposed LDO regulator has been simulated and validated using BSIM3 models and GLOBALFOUNDRIES 0.18-µm CMOS process. The simulation results have shown that the LDO regulator consumes 4.7 µA quiescent current at no load, regulating the output at 1 V from a minimum 1.2 V supply. It is able to deliver up to 450 mA load current with a dropout of 200 mV. It can be stabilized using a 4.7 µF output capacitor with a 0.1 Ω ESR resistor. The maximum transient output voltage is 64.6 mV on the basis of a load step change of 450 mA/10 ns under typical condition. The full load transient response is less than 350 ns.
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Sau Siong CHONG, Hendra KWANTONO, Pak Kwong CHAN, "A 4.7 µA Quiescent Current, 450 mA CMOS Low-Dropout Regulator with Fast Transient Response" in IEICE TRANSACTIONS on Electronics,
vol. E94-C, no. 8, pp. 1271-1281, August 2011, doi: 10.1587/transele.E94.C.1271.
Abstract: This paper presents a new low-dropout (LDO) regulator with low-quiescent, high-drive and fast-transient performance. This is based on a new composite power transistor composed of a shunt feedback class-AB embedded gain stage and the application of dynamic-biasing schemes to both the error amplifier as well as the composite power transistor. The proposed LDO regulator has been simulated and validated using BSIM3 models and GLOBALFOUNDRIES 0.18-µm CMOS process. The simulation results have shown that the LDO regulator consumes 4.7 µA quiescent current at no load, regulating the output at 1 V from a minimum 1.2 V supply. It is able to deliver up to 450 mA load current with a dropout of 200 mV. It can be stabilized using a 4.7 µF output capacitor with a 0.1 Ω ESR resistor. The maximum transient output voltage is 64.6 mV on the basis of a load step change of 450 mA/10 ns under typical condition. The full load transient response is less than 350 ns.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E94.C.1271/_p
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@ARTICLE{e94-c_8_1271,
author={Sau Siong CHONG, Hendra KWANTONO, Pak Kwong CHAN, },
journal={IEICE TRANSACTIONS on Electronics},
title={A 4.7 µA Quiescent Current, 450 mA CMOS Low-Dropout Regulator with Fast Transient Response},
year={2011},
volume={E94-C},
number={8},
pages={1271-1281},
abstract={This paper presents a new low-dropout (LDO) regulator with low-quiescent, high-drive and fast-transient performance. This is based on a new composite power transistor composed of a shunt feedback class-AB embedded gain stage and the application of dynamic-biasing schemes to both the error amplifier as well as the composite power transistor. The proposed LDO regulator has been simulated and validated using BSIM3 models and GLOBALFOUNDRIES 0.18-µm CMOS process. The simulation results have shown that the LDO regulator consumes 4.7 µA quiescent current at no load, regulating the output at 1 V from a minimum 1.2 V supply. It is able to deliver up to 450 mA load current with a dropout of 200 mV. It can be stabilized using a 4.7 µF output capacitor with a 0.1 Ω ESR resistor. The maximum transient output voltage is 64.6 mV on the basis of a load step change of 450 mA/10 ns under typical condition. The full load transient response is less than 350 ns.},
keywords={},
doi={10.1587/transele.E94.C.1271},
ISSN={1745-1353},
month={August},}
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TY - JOUR
TI - A 4.7 µA Quiescent Current, 450 mA CMOS Low-Dropout Regulator with Fast Transient Response
T2 - IEICE TRANSACTIONS on Electronics
SP - 1271
EP - 1281
AU - Sau Siong CHONG
AU - Hendra KWANTONO
AU - Pak Kwong CHAN
PY - 2011
DO - 10.1587/transele.E94.C.1271
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E94-C
IS - 8
JA - IEICE TRANSACTIONS on Electronics
Y1 - August 2011
AB - This paper presents a new low-dropout (LDO) regulator with low-quiescent, high-drive and fast-transient performance. This is based on a new composite power transistor composed of a shunt feedback class-AB embedded gain stage and the application of dynamic-biasing schemes to both the error amplifier as well as the composite power transistor. The proposed LDO regulator has been simulated and validated using BSIM3 models and GLOBALFOUNDRIES 0.18-µm CMOS process. The simulation results have shown that the LDO regulator consumes 4.7 µA quiescent current at no load, regulating the output at 1 V from a minimum 1.2 V supply. It is able to deliver up to 450 mA load current with a dropout of 200 mV. It can be stabilized using a 4.7 µF output capacitor with a 0.1 Ω ESR resistor. The maximum transient output voltage is 64.6 mV on the basis of a load step change of 450 mA/10 ns under typical condition. The full load transient response is less than 350 ns.
ER -