A 0.6-V voltage shifter and a 0.6-V clocked comparator are presented for sampling correlation-based impulse radio UWB receiver. The voltage shifter is used for a novel split swing level scheme-based CMOS transmission gate which can reduce the power consumption by four times. Compared to the conventional voltage shifter, the proposed voltage shifter can reduce the required capacitance area by half and eliminate the non-overlapping complementary clock generator. The proposed 0.6-V clocked comparator can operate at 100-MHz clock with the voltage shifter. To reduce the power consumption of the conventional continuous-time comparator based synchronization control unit, a novel clocked-comparator based control unit is presented, thereby achieving the lowest energy consumption of 3.9 pJ/bit in the correlation-based UWB receiver with the 0.5 ns timing step for data synchronization.
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Lechang LIU, Takayasu SAKURAI, Makoto TAKAMIYA, "0.6 V Voltage Shifter and Clocked Comparator for Sampling Correlation-Based Impulse Radio UWB Receiver" in IEICE TRANSACTIONS on Electronics,
vol. E94-C, no. 6, pp. 985-991, June 2011, doi: 10.1587/transele.E94.C.985.
Abstract: A 0.6-V voltage shifter and a 0.6-V clocked comparator are presented for sampling correlation-based impulse radio UWB receiver. The voltage shifter is used for a novel split swing level scheme-based CMOS transmission gate which can reduce the power consumption by four times. Compared to the conventional voltage shifter, the proposed voltage shifter can reduce the required capacitance area by half and eliminate the non-overlapping complementary clock generator. The proposed 0.6-V clocked comparator can operate at 100-MHz clock with the voltage shifter. To reduce the power consumption of the conventional continuous-time comparator based synchronization control unit, a novel clocked-comparator based control unit is presented, thereby achieving the lowest energy consumption of 3.9 pJ/bit in the correlation-based UWB receiver with the 0.5 ns timing step for data synchronization.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E94.C.985/_p
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@ARTICLE{e94-c_6_985,
author={Lechang LIU, Takayasu SAKURAI, Makoto TAKAMIYA, },
journal={IEICE TRANSACTIONS on Electronics},
title={0.6 V Voltage Shifter and Clocked Comparator for Sampling Correlation-Based Impulse Radio UWB Receiver},
year={2011},
volume={E94-C},
number={6},
pages={985-991},
abstract={A 0.6-V voltage shifter and a 0.6-V clocked comparator are presented for sampling correlation-based impulse radio UWB receiver. The voltage shifter is used for a novel split swing level scheme-based CMOS transmission gate which can reduce the power consumption by four times. Compared to the conventional voltage shifter, the proposed voltage shifter can reduce the required capacitance area by half and eliminate the non-overlapping complementary clock generator. The proposed 0.6-V clocked comparator can operate at 100-MHz clock with the voltage shifter. To reduce the power consumption of the conventional continuous-time comparator based synchronization control unit, a novel clocked-comparator based control unit is presented, thereby achieving the lowest energy consumption of 3.9 pJ/bit in the correlation-based UWB receiver with the 0.5 ns timing step for data synchronization.},
keywords={},
doi={10.1587/transele.E94.C.985},
ISSN={1745-1353},
month={June},}
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TY - JOUR
TI - 0.6 V Voltage Shifter and Clocked Comparator for Sampling Correlation-Based Impulse Radio UWB Receiver
T2 - IEICE TRANSACTIONS on Electronics
SP - 985
EP - 991
AU - Lechang LIU
AU - Takayasu SAKURAI
AU - Makoto TAKAMIYA
PY - 2011
DO - 10.1587/transele.E94.C.985
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E94-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2011
AB - A 0.6-V voltage shifter and a 0.6-V clocked comparator are presented for sampling correlation-based impulse radio UWB receiver. The voltage shifter is used for a novel split swing level scheme-based CMOS transmission gate which can reduce the power consumption by four times. Compared to the conventional voltage shifter, the proposed voltage shifter can reduce the required capacitance area by half and eliminate the non-overlapping complementary clock generator. The proposed 0.6-V clocked comparator can operate at 100-MHz clock with the voltage shifter. To reduce the power consumption of the conventional continuous-time comparator based synchronization control unit, a novel clocked-comparator based control unit is presented, thereby achieving the lowest energy consumption of 3.9 pJ/bit in the correlation-based UWB receiver with the 0.5 ns timing step for data synchronization.
ER -