IEICE TRANSACTIONS on Electronics
Modeling of NBTI Stress Induced Hole-Trapping and Interface-State-Generation Mechanisms under a Wide Range of Bias Conditions
Summary :
A predictive compact model of p-MOSFET negative bias temperature instability (NBTI) degradation for circuit simulation is reported with unified description of the interface-state-generation and hole-trapping mechanisms. It is found that the hole-trapping is responsible for the initial stage of the stress degradation, and the interface-state generation dominates the degradation afterwards, especially under high stress conditions. The predictive compact model with 8 parameters enables to reproduce the measurement results of the NBTI degradation under a wide range of stress bias conditions. Finally, the developed NBTI model is implemented into the compact MOSFET model HiSIM for circuit degradation simiulation.
- Publication
- IEICE TRANSACTIONS on Electronics Vol.E96-C No.10 pp.1339-1347
- Publication Date
- 2013/10/01
- Publicized
- Online ISSN
- 1745-1353
- DOI
- 10.1587/transele.E96.C.1339
- Type of Manuscript
- PAPER
- Category
- Electronic Components
Authors
Chenyue MA
Hiroshima University
Hans Jürgen MATTAUSCH
Hiroshima University
Masataka MIYAKE
Hiroshima University
Takahiro IIZUKA
Hiroshima University
Kazuya MATSUZAWA
Semiconductor Technology Academic Research Center
Seiichiro YAMAGUCHI
Semiconductor Technology Academic Research Center
Teruhiko HOSHIDA
Semiconductor Technology Academic Research Center
Akinori KINOSHITA
Semiconductor Technology Academic Research Center
Takahiko ARAKAWA
Semiconductor Technology Academic Research Center
Jin HE
PKU-HKUST Shenzhen-Hong Kong Institution
Mitiko MIURA-MATTAUSCH
Hiroshima University
Keyword
Latest Issue
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Chenyue MA, Hans Jürgen MATTAUSCH, Masataka MIYAKE, Takahiro IIZUKA, Kazuya MATSUZAWA, Seiichiro YAMAGUCHI, Teruhiko HOSHIDA, Akinori KINOSHITA, Takahiko ARAKAWA, Jin HE, Mitiko MIURA-MATTAUSCH, "Modeling of NBTI Stress Induced Hole-Trapping and Interface-State-Generation Mechanisms under a Wide Range of Bias Conditions" in IEICE TRANSACTIONS on Electronics,
vol. E96-C, no. 10, pp. 1339-1347, October 2013, doi: 10.1587/transele.E96.C.1339.
Abstract: A predictive compact model of p-MOSFET negative bias temperature instability (NBTI) degradation for circuit simulation is reported with unified description of the interface-state-generation and hole-trapping mechanisms. It is found that the hole-trapping is responsible for the initial stage of the stress degradation, and the interface-state generation dominates the degradation afterwards, especially under high stress conditions. The predictive compact model with 8 parameters enables to reproduce the measurement results of the NBTI degradation under a wide range of stress bias conditions. Finally, the developed NBTI model is implemented into the compact MOSFET model HiSIM for circuit degradation simiulation.
URL: https://global.ieice.org/en_transactions/electronics/10.1587/transele.E96.C.1339/_p
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@ARTICLE{e96-c_10_1339,
author={Chenyue MA, Hans Jürgen MATTAUSCH, Masataka MIYAKE, Takahiro IIZUKA, Kazuya MATSUZAWA, Seiichiro YAMAGUCHI, Teruhiko HOSHIDA, Akinori KINOSHITA, Takahiko ARAKAWA, Jin HE, Mitiko MIURA-MATTAUSCH, },
journal={IEICE TRANSACTIONS on Electronics},
title={Modeling of NBTI Stress Induced Hole-Trapping and Interface-State-Generation Mechanisms under a Wide Range of Bias Conditions},
year={2013},
volume={E96-C},
number={10},
pages={1339-1347},
abstract={A predictive compact model of p-MOSFET negative bias temperature instability (NBTI) degradation for circuit simulation is reported with unified description of the interface-state-generation and hole-trapping mechanisms. It is found that the hole-trapping is responsible for the initial stage of the stress degradation, and the interface-state generation dominates the degradation afterwards, especially under high stress conditions. The predictive compact model with 8 parameters enables to reproduce the measurement results of the NBTI degradation under a wide range of stress bias conditions. Finally, the developed NBTI model is implemented into the compact MOSFET model HiSIM for circuit degradation simiulation.},
keywords={},
doi={10.1587/transele.E96.C.1339},
ISSN={1745-1353},
month={October},}
Copy
TY - JOUR
TI - Modeling of NBTI Stress Induced Hole-Trapping and Interface-State-Generation Mechanisms under a Wide Range of Bias Conditions
T2 - IEICE TRANSACTIONS on Electronics
SP - 1339
EP - 1347
AU - Chenyue MA
AU - Hans Jürgen MATTAUSCH
AU - Masataka MIYAKE
AU - Takahiro IIZUKA
AU - Kazuya MATSUZAWA
AU - Seiichiro YAMAGUCHI
AU - Teruhiko HOSHIDA
AU - Akinori KINOSHITA
AU - Takahiko ARAKAWA
AU - Jin HE
AU - Mitiko MIURA-MATTAUSCH
PY - 2013
DO - 10.1587/transele.E96.C.1339
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E96-C
IS - 10
JA - IEICE TRANSACTIONS on Electronics
Y1 - October 2013
AB - A predictive compact model of p-MOSFET negative bias temperature instability (NBTI) degradation for circuit simulation is reported with unified description of the interface-state-generation and hole-trapping mechanisms. It is found that the hole-trapping is responsible for the initial stage of the stress degradation, and the interface-state generation dominates the degradation afterwards, especially under high stress conditions. The predictive compact model with 8 parameters enables to reproduce the measurement results of the NBTI degradation under a wide range of stress bias conditions. Finally, the developed NBTI model is implemented into the compact MOSFET model HiSIM for circuit degradation simiulation.
ER -
English
