IEICE TRANSACTIONS on Fundamentals
Fault Tolerant Dynamic Reconfigurable Device Based on EDAC with Rollback
Summary :
Reconfigurable devices are expected to be utilized in such mission-critical fields as space development and undersea cables, because system updates and pseudo-repair can be achieved remotely by reconfiguring. However, conventional reconfigurable devices suffer from memory-bit upset caused by charged particles in space which results in fatal system problems. In this paper, we propose an architecture of a fault-tolerant reconfigurable device. The proposed device is divided into "autonomous-repair cells" with embedded control circuits. The autonomous-repair cell proposed in this paper is based on error detection and correction (EDAC) and uses hardware and time redundancy. From evaluation, it is shown that the proposed architecture achieves sufficient reliability against configuration memory upset. Trade-offs between performance and cost are also analyzed.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E89-A No.12 pp.3652-3658
- Publication Date
- 2006/12/01
- Publicized
- Online ISSN
- 1745-1337
- DOI
- 10.1093/ietfec/e89-a.12.3652
- Type of Manuscript
- Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
- Category
- VLSI Architecture
Authors
Keyword
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Kentaro NAKAHARA, Shin'ichi KOUYAMA, Tomonori IZUMI, Hiroyuki OCHI, Yukihiro NAKAMURA, "Fault Tolerant Dynamic Reconfigurable Device Based on EDAC with Rollback" in IEICE TRANSACTIONS on Fundamentals,
vol. E89-A, no. 12, pp. 3652-3658, December 2006, doi: 10.1093/ietfec/e89-a.12.3652.
Abstract: Reconfigurable devices are expected to be utilized in such mission-critical fields as space development and undersea cables, because system updates and pseudo-repair can be achieved remotely by reconfiguring. However, conventional reconfigurable devices suffer from memory-bit upset caused by charged particles in space which results in fatal system problems. In this paper, we propose an architecture of a fault-tolerant reconfigurable device. The proposed device is divided into "autonomous-repair cells" with embedded control circuits. The autonomous-repair cell proposed in this paper is based on error detection and correction (EDAC) and uses hardware and time redundancy. From evaluation, it is shown that the proposed architecture achieves sufficient reliability against configuration memory upset. Trade-offs between performance and cost are also analyzed.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1093/ietfec/e89-a.12.3652/_p
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@ARTICLE{e89-a_12_3652,
author={Kentaro NAKAHARA, Shin'ichi KOUYAMA, Tomonori IZUMI, Hiroyuki OCHI, Yukihiro NAKAMURA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Fault Tolerant Dynamic Reconfigurable Device Based on EDAC with Rollback},
year={2006},
volume={E89-A},
number={12},
pages={3652-3658},
abstract={Reconfigurable devices are expected to be utilized in such mission-critical fields as space development and undersea cables, because system updates and pseudo-repair can be achieved remotely by reconfiguring. However, conventional reconfigurable devices suffer from memory-bit upset caused by charged particles in space which results in fatal system problems. In this paper, we propose an architecture of a fault-tolerant reconfigurable device. The proposed device is divided into "autonomous-repair cells" with embedded control circuits. The autonomous-repair cell proposed in this paper is based on error detection and correction (EDAC) and uses hardware and time redundancy. From evaluation, it is shown that the proposed architecture achieves sufficient reliability against configuration memory upset. Trade-offs between performance and cost are also analyzed.},
keywords={},
doi={10.1093/ietfec/e89-a.12.3652},
ISSN={1745-1337},
month={December},}
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TY - JOUR
TI - Fault Tolerant Dynamic Reconfigurable Device Based on EDAC with Rollback
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 3652
EP - 3658
AU - Kentaro NAKAHARA
AU - Shin'ichi KOUYAMA
AU - Tomonori IZUMI
AU - Hiroyuki OCHI
AU - Yukihiro NAKAMURA
PY - 2006
DO - 10.1093/ietfec/e89-a.12.3652
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E89-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2006
AB - Reconfigurable devices are expected to be utilized in such mission-critical fields as space development and undersea cables, because system updates and pseudo-repair can be achieved remotely by reconfiguring. However, conventional reconfigurable devices suffer from memory-bit upset caused by charged particles in space which results in fatal system problems. In this paper, we propose an architecture of a fault-tolerant reconfigurable device. The proposed device is divided into "autonomous-repair cells" with embedded control circuits. The autonomous-repair cell proposed in this paper is based on error detection and correction (EDAC) and uses hardware and time redundancy. From evaluation, it is shown that the proposed architecture achieves sufficient reliability against configuration memory upset. Trade-offs between performance and cost are also analyzed.
ER -
English
