We present a current mode cyclic analog-to-digital converter that is suitable for submicron LSI fabrication processes. Our converter is composed of sample-and-hold circuits with regulated cascode configuration which offers high output impedance and wide outoput range. The circuit requires small area since the architecture depends on neither precise analog transistors nor ratio-matched capacitors. We have designed and fabricated a test circuit that has an area of 0.014mm2 using a 0.8µm CMOS process. The circuit is examined to perform 8-bit resolution at a sampling rate of 40kHz and average power dissipation of 370µW at 4V supply voltage.
The copyright of the original papers published on this site belongs to IEICE. Unauthorized use of the original or translated papers is prohibited. See IEICE Provisions on Copyright for details.
Copy
Masaki KONDO, Hidetoshi ONODERA, Keikichi TAMARU, "A Current Mode Cyclic A/D Converter with Submicron Processes" in IEICE TRANSACTIONS on Fundamentals,
vol. E80-A, no. 2, pp. 360-364, February 1997, doi: .
Abstract: We present a current mode cyclic analog-to-digital converter that is suitable for submicron LSI fabrication processes. Our converter is composed of sample-and-hold circuits with regulated cascode configuration which offers high output impedance and wide outoput range. The circuit requires small area since the architecture depends on neither precise analog transistors nor ratio-matched capacitors. We have designed and fabricated a test circuit that has an area of 0.014mm2 using a 0.8µm CMOS process. The circuit is examined to perform 8-bit resolution at a sampling rate of 40kHz and average power dissipation of 370µW at 4V supply voltage.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e80-a_2_360/_p
Copy
@ARTICLE{e80-a_2_360,
author={Masaki KONDO, Hidetoshi ONODERA, Keikichi TAMARU, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A Current Mode Cyclic A/D Converter with Submicron Processes},
year={1997},
volume={E80-A},
number={2},
pages={360-364},
abstract={We present a current mode cyclic analog-to-digital converter that is suitable for submicron LSI fabrication processes. Our converter is composed of sample-and-hold circuits with regulated cascode configuration which offers high output impedance and wide outoput range. The circuit requires small area since the architecture depends on neither precise analog transistors nor ratio-matched capacitors. We have designed and fabricated a test circuit that has an area of 0.014mm2 using a 0.8µm CMOS process. The circuit is examined to perform 8-bit resolution at a sampling rate of 40kHz and average power dissipation of 370µW at 4V supply voltage.},
keywords={},
doi={},
ISSN={},
month={February},}
Copy
TY - JOUR
TI - A Current Mode Cyclic A/D Converter with Submicron Processes
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 360
EP - 364
AU - Masaki KONDO
AU - Hidetoshi ONODERA
AU - Keikichi TAMARU
PY - 1997
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E80-A
IS - 2
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - February 1997
AB - We present a current mode cyclic analog-to-digital converter that is suitable for submicron LSI fabrication processes. Our converter is composed of sample-and-hold circuits with regulated cascode configuration which offers high output impedance and wide outoput range. The circuit requires small area since the architecture depends on neither precise analog transistors nor ratio-matched capacitors. We have designed and fabricated a test circuit that has an area of 0.014mm2 using a 0.8µm CMOS process. The circuit is examined to perform 8-bit resolution at a sampling rate of 40kHz and average power dissipation of 370µW at 4V supply voltage.
ER -