In this paper, by making good use of the parallel-transit-evaluation algorithm and sparsity of the connection between neurons, a pipeline structure is successfully introduced to the sequential Boltzmann machine processor. The novel structure speeds up nine times faster than the previous one, with only the 12% rise in hardware resources under 10,000 neurons. The performance is confirmed by designing it using 1.2 µm CMOS process standard cells and analyzing the probability of state-change.
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Hongbing ZHU, Mamoru SASAKI, Takahiro INOUE, "A Pipeline Structure for the Sequential Boltzmann Machine" in IEICE TRANSACTIONS on Fundamentals,
vol. E82-A, no. 6, pp. 920-926, June 1999, doi: .
Abstract: In this paper, by making good use of the parallel-transit-evaluation algorithm and sparsity of the connection between neurons, a pipeline structure is successfully introduced to the sequential Boltzmann machine processor. The novel structure speeds up nine times faster than the previous one, with only the 12% rise in hardware resources under 10,000 neurons. The performance is confirmed by designing it using 1.2 µm CMOS process standard cells and analyzing the probability of state-change.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e82-a_6_920/_p
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@ARTICLE{e82-a_6_920,
author={Hongbing ZHU, Mamoru SASAKI, Takahiro INOUE, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A Pipeline Structure for the Sequential Boltzmann Machine},
year={1999},
volume={E82-A},
number={6},
pages={920-926},
abstract={In this paper, by making good use of the parallel-transit-evaluation algorithm and sparsity of the connection between neurons, a pipeline structure is successfully introduced to the sequential Boltzmann machine processor. The novel structure speeds up nine times faster than the previous one, with only the 12% rise in hardware resources under 10,000 neurons. The performance is confirmed by designing it using 1.2 µm CMOS process standard cells and analyzing the probability of state-change.},
keywords={},
doi={},
ISSN={},
month={June},}
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TY - JOUR
TI - A Pipeline Structure for the Sequential Boltzmann Machine
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 920
EP - 926
AU - Hongbing ZHU
AU - Mamoru SASAKI
AU - Takahiro INOUE
PY - 1999
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E82-A
IS - 6
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - June 1999
AB - In this paper, by making good use of the parallel-transit-evaluation algorithm and sparsity of the connection between neurons, a pipeline structure is successfully introduced to the sequential Boltzmann machine processor. The novel structure speeds up nine times faster than the previous one, with only the 12% rise in hardware resources under 10,000 neurons. The performance is confirmed by designing it using 1.2 µm CMOS process standard cells and analyzing the probability of state-change.
ER -