IEICE TRANSACTIONS on Fundamentals
A Novel Application of Verilog-A to Modeling and Simulation of High-Speed Interconnects in Time/Frequency Transform-Domain
Summary :
This letter presents a novel application of the Verilog-A, which is a hardware description language for analog circuits, to the modeling and simulation of high-speed interconnects in time/frequency transform-domain for signal integrity problems. This modeling method with the Verilog-A language would handle the transfer function approximation and admittance matrices, which are expressed by the dominant poles and residues as used in AWE technique. Finally, it is shown that modeling and simulation of the high-speed interconnects with nonlinear terminations can be done easily.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E85-A No.2 pp.395-398
- Publication Date
- 2002/02/01
- Publicized
- Online ISSN
- DOI
- Type of Manuscript
- Special Section LETTER (Special Section on Analog Circuit Techniques and Related Topics)
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Kenichi SUZUKI, Mitsuhiro TAKEDA, Atsushi KAMO, Hideki ASAI, "A Novel Application of Verilog-A to Modeling and Simulation of High-Speed Interconnects in Time/Frequency Transform-Domain" in IEICE TRANSACTIONS on Fundamentals,
vol. E85-A, no. 2, pp. 395-398, February 2002, doi: .
Abstract: This letter presents a novel application of the Verilog-A, which is a hardware description language for analog circuits, to the modeling and simulation of high-speed interconnects in time/frequency transform-domain for signal integrity problems. This modeling method with the Verilog-A language would handle the transfer function approximation and admittance matrices, which are expressed by the dominant poles and residues as used in AWE technique. Finally, it is shown that modeling and simulation of the high-speed interconnects with nonlinear terminations can be done easily.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/e85-a_2_395/_p
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@ARTICLE{e85-a_2_395,
author={Kenichi SUZUKI, Mitsuhiro TAKEDA, Atsushi KAMO, Hideki ASAI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={A Novel Application of Verilog-A to Modeling and Simulation of High-Speed Interconnects in Time/Frequency Transform-Domain},
year={2002},
volume={E85-A},
number={2},
pages={395-398},
abstract={This letter presents a novel application of the Verilog-A, which is a hardware description language for analog circuits, to the modeling and simulation of high-speed interconnects in time/frequency transform-domain for signal integrity problems. This modeling method with the Verilog-A language would handle the transfer function approximation and admittance matrices, which are expressed by the dominant poles and residues as used in AWE technique. Finally, it is shown that modeling and simulation of the high-speed interconnects with nonlinear terminations can be done easily.},
keywords={},
doi={},
ISSN={},
month={February},}
Copy
TY - JOUR
TI - A Novel Application of Verilog-A to Modeling and Simulation of High-Speed Interconnects in Time/Frequency Transform-Domain
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 395
EP - 398
AU - Kenichi SUZUKI
AU - Mitsuhiro TAKEDA
AU - Atsushi KAMO
AU - Hideki ASAI
PY - 2002
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E85-A
IS - 2
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - February 2002
AB - This letter presents a novel application of the Verilog-A, which is a hardware description language for analog circuits, to the modeling and simulation of high-speed interconnects in time/frequency transform-domain for signal integrity problems. This modeling method with the Verilog-A language would handle the transfer function approximation and admittance matrices, which are expressed by the dominant poles and residues as used in AWE technique. Finally, it is shown that modeling and simulation of the high-speed interconnects with nonlinear terminations can be done easily.
ER -
English
