The search functionality is under construction.

IEICE TRANSACTIONS on Fundamentals

A Fractional Phase Interpolator Using Two-Step Integration for Frequency Multiplication and Direct Digital Synthesis

Hideyuki NOSAKA, Yo YAMAGUCHI, Akihiro YAMAGISHI, Masahiro MURAGUCHI

  • Full Text Views

    0

  • Cite this

Summary :

We propose a new phase interpolator that provides precise fractional phase pulses without the need to adjust circuit constants. The variable phases are produced by detecting the coincidence of two voltages, the ramp wave and the threshold voltage. The new phase interpolator can keep the same ramp wave slope and the same threshold voltage for different output phases. This significantly reduces the power dissipation of the voltage comparator. This phase interpolator can be applied to various timing circuits and clock generators, such as frequency multipliers and direct digital synthesizers. We present a novel frequency doubler, a novel frequency tripler, a direct digital synthesizer (DDS), and a novel wideband DDS (WDDS) as applications of our new phase interpolator, which uses 0.35-mm CMOS process technology. Experimental results confirm the functionarity of the new phase interpolator. An 8-bit complete DDS IC dissipates only 2.1 mA at a 50-MHz clock rate and a supply voltage of 2.8 V.

Publication
IEICE TRANSACTIONS on Fundamentals Vol.E86-A No.2 pp.304-312
Publication Date
2003/02/01
Publicized
Online ISSN
DOI
Type of Manuscript
Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category

Authors

Keyword