SAT-Based Test Generation for Open Faults Using Fault Excitation Caused by Effect of Adjacent Lines
Summary :
Open faults are difficult to test since the voltage at the floating line is unpredictable and depends on the voltage at the adjacent lines. The effect of open faults can be easily excited if a test pattern provides the opposite logic value to most of the adjacent lines. In this paper, we present a procedure to generate as high a quality test as possible. We define the test quality for evaluating the effect of adjacent lines by assigning an opposite logic value to the faulty line. In our proposed test generation method, we utilize the SAT-based ATPG method. We generate test patterns that propagate the faulty effect to primary outputs and assign logic values to adjacent lines opposite that of the faulty line. In order to estimate test quality for open faults, we define the excitation effectiveness Eeff. To reduce the test volume, we utilize the open fault simulation. We calculate the excitation effectiveness by open fault simulation in order to eliminate unnecessary test patterns. The experimental results for the benchmark circuits prove the effectiveness of our procedure.
- Publication
- IEICE TRANSACTIONS on Fundamentals Vol.E96-A No.12 pp.2561-2567
- Publication Date
- 2013/12/01
- Publicized
- Online ISSN
- 1745-1337
- DOI
- 10.1587/transfun.E96.A.2561
- Type of Manuscript
- Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
- Category
- Logic Synthesis, Test and Verification
Authors
Jun YAMASHITA
The University of Tokushima
Hiroyuki YOTSUYANAGI
The University of Tokushima
Masaki HASHIZUME
The University of Tokushima
Kozo KINOSHITA
Osaka Gakuin University
Keyword
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Jun YAMASHITA, Hiroyuki YOTSUYANAGI, Masaki HASHIZUME, Kozo KINOSHITA, "SAT-Based Test Generation for Open Faults Using Fault Excitation Caused by Effect of Adjacent Lines" in IEICE TRANSACTIONS on Fundamentals,
vol. E96-A, no. 12, pp. 2561-2567, December 2013, doi: 10.1587/transfun.E96.A.2561.
Abstract: Open faults are difficult to test since the voltage at the floating line is unpredictable and depends on the voltage at the adjacent lines. The effect of open faults can be easily excited if a test pattern provides the opposite logic value to most of the adjacent lines. In this paper, we present a procedure to generate as high a quality test as possible. We define the test quality for evaluating the effect of adjacent lines by assigning an opposite logic value to the faulty line. In our proposed test generation method, we utilize the SAT-based ATPG method. We generate test patterns that propagate the faulty effect to primary outputs and assign logic values to adjacent lines opposite that of the faulty line. In order to estimate test quality for open faults, we define the excitation effectiveness Eeff. To reduce the test volume, we utilize the open fault simulation. We calculate the excitation effectiveness by open fault simulation in order to eliminate unnecessary test patterns. The experimental results for the benchmark circuits prove the effectiveness of our procedure.
URL: https://global.ieice.org/en_transactions/fundamentals/10.1587/transfun.E96.A.2561/_p
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@ARTICLE{e96-a_12_2561,
author={Jun YAMASHITA, Hiroyuki YOTSUYANAGI, Masaki HASHIZUME, Kozo KINOSHITA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={SAT-Based Test Generation for Open Faults Using Fault Excitation Caused by Effect of Adjacent Lines},
year={2013},
volume={E96-A},
number={12},
pages={2561-2567},
abstract={Open faults are difficult to test since the voltage at the floating line is unpredictable and depends on the voltage at the adjacent lines. The effect of open faults can be easily excited if a test pattern provides the opposite logic value to most of the adjacent lines. In this paper, we present a procedure to generate as high a quality test as possible. We define the test quality for evaluating the effect of adjacent lines by assigning an opposite logic value to the faulty line. In our proposed test generation method, we utilize the SAT-based ATPG method. We generate test patterns that propagate the faulty effect to primary outputs and assign logic values to adjacent lines opposite that of the faulty line. In order to estimate test quality for open faults, we define the excitation effectiveness Eeff. To reduce the test volume, we utilize the open fault simulation. We calculate the excitation effectiveness by open fault simulation in order to eliminate unnecessary test patterns. The experimental results for the benchmark circuits prove the effectiveness of our procedure.},
keywords={},
doi={10.1587/transfun.E96.A.2561},
ISSN={1745-1337},
month={December},}
Copy
TY - JOUR
TI - SAT-Based Test Generation for Open Faults Using Fault Excitation Caused by Effect of Adjacent Lines
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2561
EP - 2567
AU - Jun YAMASHITA
AU - Hiroyuki YOTSUYANAGI
AU - Masaki HASHIZUME
AU - Kozo KINOSHITA
PY - 2013
DO - 10.1587/transfun.E96.A.2561
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E96-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2013
AB - Open faults are difficult to test since the voltage at the floating line is unpredictable and depends on the voltage at the adjacent lines. The effect of open faults can be easily excited if a test pattern provides the opposite logic value to most of the adjacent lines. In this paper, we present a procedure to generate as high a quality test as possible. We define the test quality for evaluating the effect of adjacent lines by assigning an opposite logic value to the faulty line. In our proposed test generation method, we utilize the SAT-based ATPG method. We generate test patterns that propagate the faulty effect to primary outputs and assign logic values to adjacent lines opposite that of the faulty line. In order to estimate test quality for open faults, we define the excitation effectiveness Eeff. To reduce the test volume, we utilize the open fault simulation. We calculate the excitation effectiveness by open fault simulation in order to eliminate unnecessary test patterns. The experimental results for the benchmark circuits prove the effectiveness of our procedure.
ER -
English
