A Novel Per-Test Fault Diagnosis Method Based on the Extended X-Fault Model for Deep-Submicron LSI Circuits
Summary :
Per-test diagnosis based on the X-fault model is an effective approach for a circuit with physical defects of non-deterministic logic behavior. However, the extensive use of vias and buffers in a deep-submicron circuit and the unpredictable order relation among threshold voltages at the fanout branches of a gate have not been fully addressed by conventional per-test X-fault diagnosis. To take these factors into consideration, this paper proposes an improved per-test X-fault diagnosis method, featuring (1) an extended X-fault model to handle vias and buffers and (2) the use of occurrence probabilities of logic behaviors for a physical defect to handle the unpredictable relation among threshold voltages. Experimental results show the effectiveness of the proposed method.
- Publication
- IEICE TRANSACTIONS on Information Vol.E91-D No.3 pp.667-674
- Publication Date
- 2008/03/01
- Publicized
- Online ISSN
- 1745-1361
- DOI
- 10.1093/ietisy/e91-d.3.667
- Type of Manuscript
- Special Section PAPER (Special Section on Test and Verification of VLSIs)
- Category
- Fault Diagnosis
Authors
Keyword
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Yuta YAMATO, Yusuke NAKAMURA, Kohei MIYASE, Xiaoqing WEN, Seiji KAJIHARA, "A Novel Per-Test Fault Diagnosis Method Based on the Extended X-Fault Model for Deep-Submicron LSI Circuits" in IEICE TRANSACTIONS on Information,
vol. E91-D, no. 3, pp. 667-674, March 2008, doi: 10.1093/ietisy/e91-d.3.667.
Abstract: Per-test diagnosis based on the X-fault model is an effective approach for a circuit with physical defects of non-deterministic logic behavior. However, the extensive use of vias and buffers in a deep-submicron circuit and the unpredictable order relation among threshold voltages at the fanout branches of a gate have not been fully addressed by conventional per-test X-fault diagnosis. To take these factors into consideration, this paper proposes an improved per-test X-fault diagnosis method, featuring (1) an extended X-fault model to handle vias and buffers and (2) the use of occurrence probabilities of logic behaviors for a physical defect to handle the unpredictable relation among threshold voltages. Experimental results show the effectiveness of the proposed method.
URL: https://global.ieice.org/en_transactions/information/10.1093/ietisy/e91-d.3.667/_p
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@ARTICLE{e91-d_3_667,
author={Yuta YAMATO, Yusuke NAKAMURA, Kohei MIYASE, Xiaoqing WEN, Seiji KAJIHARA, },
journal={IEICE TRANSACTIONS on Information},
title={A Novel Per-Test Fault Diagnosis Method Based on the Extended X-Fault Model for Deep-Submicron LSI Circuits},
year={2008},
volume={E91-D},
number={3},
pages={667-674},
abstract={Per-test diagnosis based on the X-fault model is an effective approach for a circuit with physical defects of non-deterministic logic behavior. However, the extensive use of vias and buffers in a deep-submicron circuit and the unpredictable order relation among threshold voltages at the fanout branches of a gate have not been fully addressed by conventional per-test X-fault diagnosis. To take these factors into consideration, this paper proposes an improved per-test X-fault diagnosis method, featuring (1) an extended X-fault model to handle vias and buffers and (2) the use of occurrence probabilities of logic behaviors for a physical defect to handle the unpredictable relation among threshold voltages. Experimental results show the effectiveness of the proposed method.},
keywords={},
doi={10.1093/ietisy/e91-d.3.667},
ISSN={1745-1361},
month={March},}
Copy
TY - JOUR
TI - A Novel Per-Test Fault Diagnosis Method Based on the Extended X-Fault Model for Deep-Submicron LSI Circuits
T2 - IEICE TRANSACTIONS on Information
SP - 667
EP - 674
AU - Yuta YAMATO
AU - Yusuke NAKAMURA
AU - Kohei MIYASE
AU - Xiaoqing WEN
AU - Seiji KAJIHARA
PY - 2008
DO - 10.1093/ietisy/e91-d.3.667
JO - IEICE TRANSACTIONS on Information
SN - 1745-1361
VL - E91-D
IS - 3
JA - IEICE TRANSACTIONS on Information
Y1 - March 2008
AB - Per-test diagnosis based on the X-fault model is an effective approach for a circuit with physical defects of non-deterministic logic behavior. However, the extensive use of vias and buffers in a deep-submicron circuit and the unpredictable order relation among threshold voltages at the fanout branches of a gate have not been fully addressed by conventional per-test X-fault diagnosis. To take these factors into consideration, this paper proposes an improved per-test X-fault diagnosis method, featuring (1) an extended X-fault model to handle vias and buffers and (2) the use of occurrence probabilities of logic behaviors for a physical defect to handle the unpredictable relation among threshold voltages. Experimental results show the effectiveness of the proposed method.
ER -
English
