A Reconfigurable Parallel Processor Based on a TDLCA Model
Summary :
This paper proposes a reconfigurable parallel processor based on a two-dimensional linear celular automaton model. The processor based on the model can be reconfigured quickly by utilizing the characteristics of the automaton used for its model. Moreover, the processor has short data path length between processing elements compared with the length of the processor based on one-dimensional linear cellular automaton model which has been already discussed. The processing elements of the processor based on the two-dimensional linear cellular automaton model are regarded as cells and the operational states of the processor are treated as the states of the automaton. When faults are detected, the processor can be reconfigured by changing its state under the state transition function of the processor determined by the weighting function of the automaton model. The processor can be reconfigured within a clock period required for making a state transition. This processor is extremely effective for real-time data processing systems required high reliability.
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- IEICE TRANSACTIONS on Information Vol.E76-D No.11 pp.1358-1364
- Publication Date
- 1993/11/25
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- Type of Manuscript
- Special Section PAPER (Special Issue on Responsive Computer Systems)
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Masahiro TSUNOYAMA, Masataka KAWANAKA, Sachio NAITO, "A Reconfigurable Parallel Processor Based on a TDLCA Model" in IEICE TRANSACTIONS on Information,
vol. E76-D, no. 11, pp. 1358-1364, November 1993, doi: .
Abstract: This paper proposes a reconfigurable parallel processor based on a two-dimensional linear celular automaton model. The processor based on the model can be reconfigured quickly by utilizing the characteristics of the automaton used for its model. Moreover, the processor has short data path length between processing elements compared with the length of the processor based on one-dimensional linear cellular automaton model which has been already discussed. The processing elements of the processor based on the two-dimensional linear cellular automaton model are regarded as cells and the operational states of the processor are treated as the states of the automaton. When faults are detected, the processor can be reconfigured by changing its state under the state transition function of the processor determined by the weighting function of the automaton model. The processor can be reconfigured within a clock period required for making a state transition. This processor is extremely effective for real-time data processing systems required high reliability.
URL: https://global.ieice.org/en_transactions/information/10.1587/e76-d_11_1358/_p
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@ARTICLE{e76-d_11_1358,
author={Masahiro TSUNOYAMA, Masataka KAWANAKA, Sachio NAITO, },
journal={IEICE TRANSACTIONS on Information},
title={A Reconfigurable Parallel Processor Based on a TDLCA Model},
year={1993},
volume={E76-D},
number={11},
pages={1358-1364},
abstract={This paper proposes a reconfigurable parallel processor based on a two-dimensional linear celular automaton model. The processor based on the model can be reconfigured quickly by utilizing the characteristics of the automaton used for its model. Moreover, the processor has short data path length between processing elements compared with the length of the processor based on one-dimensional linear cellular automaton model which has been already discussed. The processing elements of the processor based on the two-dimensional linear cellular automaton model are regarded as cells and the operational states of the processor are treated as the states of the automaton. When faults are detected, the processor can be reconfigured by changing its state under the state transition function of the processor determined by the weighting function of the automaton model. The processor can be reconfigured within a clock period required for making a state transition. This processor is extremely effective for real-time data processing systems required high reliability.},
keywords={},
doi={},
ISSN={},
month={November},}
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TY - JOUR
TI - A Reconfigurable Parallel Processor Based on a TDLCA Model
T2 - IEICE TRANSACTIONS on Information
SP - 1358
EP - 1364
AU - Masahiro TSUNOYAMA
AU - Masataka KAWANAKA
AU - Sachio NAITO
PY - 1993
DO -
JO - IEICE TRANSACTIONS on Information
SN -
VL - E76-D
IS - 11
JA - IEICE TRANSACTIONS on Information
Y1 - November 1993
AB - This paper proposes a reconfigurable parallel processor based on a two-dimensional linear celular automaton model. The processor based on the model can be reconfigured quickly by utilizing the characteristics of the automaton used for its model. Moreover, the processor has short data path length between processing elements compared with the length of the processor based on one-dimensional linear cellular automaton model which has been already discussed. The processing elements of the processor based on the two-dimensional linear cellular automaton model are regarded as cells and the operational states of the processor are treated as the states of the automaton. When faults are detected, the processor can be reconfigured by changing its state under the state transition function of the processor determined by the weighting function of the automaton model. The processor can be reconfigured within a clock period required for making a state transition. This processor is extremely effective for real-time data processing systems required high reliability.
ER -
English
