A relaxation-based technique exploiting latency and multirate behaviors is proposed for electrical simulation of MOS digital circuits. An efficient window size control scheme is also developed.

Sea clutter was measured using an X-band shipboard radar of horizontal polarization, pulse with 250 ns, azimuth beamwidth with 1.0 and grazing angles between 4.2 and 13.4. It is shown that sea clutter amplitude statistics obey a log-normal distribution or a Weibull distribution for different azimuth sectors.

In the measurement of actual random phenomenon, the observed data often result in a loss or are distorted due to the existence of a definite dynamic range of measurement instruments. In this study, a trial on the stochastic signal processing for the incomplete data with loss or distortion is newly proposed. Concretely, by regarding the observed data within a finite dynamic measurement range as a random variable with a amplitude saturation, a new unified expression of the probability distribution function matched to this amplitude limitation is derived in a series expansion form. Next, as an application of the above probability expression, a state estimation method based on the above incomplete observations is theoretically proposed through an establishment of wide sence digital filter under the actual situation of existence of the additional noise. Finally, the validity and the effectiveness of the proposed method are experimentally confirmed.

On the basis of inequality theorems for nonlinear differential equations, resistor-transfergate-capacitor ladder networks driven by an inverter-type logic gate are proven to have monotone sensitivities to perturbations in the inputs of the inverter-type gate, to those in the control signals of the transfer gates, and to the variations in transistors.

Reliability of single-loop networks can be improved using double loops: forward loops advancing to the neighboring node and backward loops skipping by a certain distance. In this type of double loop networks, when some nodes break down, threre exist possibilities that a message can not be transmitted to some nodes, and some other messages must take a roundabout route. Then, the delay may happen in data transmission. This phenomenon depends on the configulation of the network and the fault location. This paper investigates, first, the number of available communications, and next the maximum distance between any computer pair when two or more computers break down in the network. Finally routing algorithm to find a route where a message can be transmitted to the destination node is presented.

A new method of signal encoding, called MRAC coding, is proposed based on Model Reference Adaptive Control (MRAC) system theory. Under certain limited situation, it is aimed to explore a way to attain higher system performances by introducing a new account for the effect of the quantizer nonlinearity. Though the MRAC coding is a kind of so-called waveform coding, it is not a form of predictive coding, but, say, control coding. In the system, pulses, which control the output of a system having pole-zero transfer function to follow the given signal, are determined and quantized to send to the receiver. The MRAC coding is considered, in principle, to be applicable to encode a variety of signals. The present paper is intending to give the detailed and unified theory of the MRAC coding and to check its feasibility through the experimental studies.

This paper describes a newly-developed 4 GHz 135 Mbps 256 QAM system with a rolloff factor of 20%, which can attain a spectrum efficiency of 6.75 bps/Hz. The key techniques are theoretically investigated to realize this system. It was predicted theoretically that the simultaneous incorporation of 7-tap transversal equalizers (TEQL) and a recursive slope equalizer (SEQL) would be required as countermeasure for multipath fading. The 256 QAM system was designed considering the results of the theoretical investigation. Excellent BER performance was obtained with the aid of forward error correction and pilot carrier injection. Since remarkable improvement in the signature was obtained by the simultaneous user of TEQL and SEQL, the 256 QAM system with a very low rolloff factor is promising.

This paper proposes a circuit configuration for realizing third-order CR oscillator, and studies its oscillation characteristics. It is shown that the oscillator can be realized by using an inverter type D-R mutator, transforming a resistor into a frequency dependent negative conductance with Ys²D, and a positive type second generation current conveyor as a noninverting amplifier. Since the inverter type D-R mutator consists of two current conveyors which are basically voltage controlled current sources, an analysis has been carried out based on actual characteristics of current conveyors and an equivalent circuit has been derived. The oscillation condition of oscillator circuit consisting of D-R mutator and noninverting amplifier is derived. The frequency of oscillation of this oscillator is tunable over a wide range by single grounded resistor, and the condition of oscillation is shown to be very simple. Theoretical and experimental results have been compared and discussed, and usefulness of proposed circuit is confirmed.

This paper presents several statistical and empirical approaches to estimating circuit area required for laying out a given number of random-logic gates. The approaches are developed for MOS layout methods in which terminals for load and driver devices account for independent wiring tracks. For placements and interconnections, two statistical models involving (a) linear superposition of one-dimensional placements and (b) uniform, diffused connections of terminals on a wiring track, are introduced. Block width dependent wiring track requirements are determined by incorporating one-dimensional logic partitioning across the block. An empirical relationship for the spatial partitioning is established from a collection of placements done with a manual layout method.

In this paper, effectiveness and applicability of the models presented in the preceding paper are discussed. First, a collection of manually placed blocks employed for a 32-bit CPU design have been examined. Postulated linearities of the placement and partitioning are seen to be acceptable with reasonable statistical accuracy. One finding is that the extrapolation of the linear partitioning model gives a statistical 'first-order' value of the circuit area for custom chip design, typically done automatically on long one-dimensional rows of standard cells or gate arrays. Several statistical properties of terminals in a manually placed block are also presented.

A 12-GHz-band GaAs monolithic dual-gate FET mixer using a novel circuit configuration has been demonstrated. Adoption of a negative feedback circuit has reduced the output impedance of the mixing dual-gate FET down to 330 Ω, which is approximately one fourth that of conventional dual-gate FET mixers, resulting in good matching to the next state. An experimental MMIC mixer, which included an IF buffer amplifier, exhibited a 3.4-4.2-dB conversion gain with a 11.3-11.6-dB SSB noise figure in the 11.7-12.2-GHz RF band.

In this paper, two synthesis methods of fuzzy membership function circuits with multiple inputs are proposed. By using bounded-differences expressions, membership function representations suitable for logic circuits in current mode is obtained. In bounded-difference expressions, bounded-difference, switch function and algebraic sum are used. Since these operations can be realized by MOS current-mirrors, MOS pass-transistors and wired-sum connections, the membership function circuits with multiple inputs can be built with these circuit elements. Therefore the synthesized circuits can be implemented in MOS IC forms. The potential applications of the membership function circuits with multiple inputs are real-time inference engine and fuzzy ROM.

In this paper, a new method for radical extraction of handritten Chinese characters is proposed. This method, called Background Thinning (BT) method consists of three processing steps: dividing by projection, dividing by background thinning and dividing by window extraction. The BT method is considered to help solving the problems of the radical extraction in our OCR (Optical Character Reader) system, which can find an optimum cursive dividing-path to divide a character into radicals. If there is no joinning strokes between two radicals, a continuous dividing-path can be found, and the character can be divided into radicals by means of this cursive dividing-path. If there is some joinning strokes between two radicals, the dividing-path is discontinuous and a window is designed to point them out. By analyzing the joinning strokes in this window (natural or unnatural connection), a divisible character with unnatural connecting strokes can be divided into radicals by connecting the discontinuous dividing-path in this window. The experiment was conducted on the database ETL8 (produced by Electrotechnical laboratory in Japan), which consists of 881 Chinese characters and 160 variations for each character. We have used 351 Chinese characters in the ETL8 as test data and the experimental results prove that the method is useful.

A zero-knowledge proof system for the discrete logarithm problem is proposed. The idea can be applied to homomorphic one-way functions in general. This is a method to prove that one really knows a discrete logarithm without revealing any information about the logarithm itself. The algorithms are probabilistic ones, performed by two users: the prover and the verifier. The prover proves to the verifier that it knows a discrete logarithm. The prover may cheat the verifier with the probability at most 1/2, but this probability can be decreased by repeating the procedure several times.