Wireless video sensor networks address problems, such as low power consumption of sensor nodes, low computing capacity of nodes, and unstable channel bandwidth. To transmit video of distributed video coding in wireless video sensor networks, we propose an efficient scalable distributed video coding scheme. In this scheme, the scalable Wyner-Ziv frame is based on transmission of different wavelet information, while the Key frame is based on transmission of different residual information. A successive refinement of side information for the Wyner-Ziv and Key frames are proposed in this scheme. Test results show that both the Wyner-Ziv and Key frames have four layers in quality and bit-rate scalable, but no increase in complexity of the encoder.

Cross-component linear model (CCLM) chromaticity prediction is a new technique introduced in Versatile Video Coding (VVC), which utilizes the reconstructed luminance component to predict the chromaticity parts, and can improve the coding performance. However, it increases the coding complexity. In this paper, how to accelerate the chroma intra-prediction process is studied based on texture characteristics. Firstly, two observations have been found through experimental statistics for the process. One is that the choice of the chroma intra-prediction candidate modes is closely related to the texture complexity of the coding unit (CU), and the other is that whether the direct mode (DM) is selected is closely related to the texture similarity between current chromaticity CU and the corresponding luminance CU. Secondly, a fast chroma intra-prediction mode decision algorithm is proposed based on these observations. A modified metric named sum modulus difference (SMD) is introduced to measure the texture complexity of CU and guide the filtering of the irrelevant candidate modes. Meanwhile, the structural similarity index measurement (SSIM) is adopted to help judging the selection of the DM mode. The experimental results show that compared with the reference model VTM8.0, the proposed algorithm can reduce the coding time by 12.92% on average, and increases the BD-rate of Y, U, and V components by only 0.05%, 0.32%, and 0.29% respectively.

In this letter, the interference cancellation technique is introduced to single carrier (SC) block transmission systems in sparse Rician frequency selective fading channels, and an effective equalizer is presented. Hard decision on the transmitted signal is made by commonly used SC equalizers, and every multipath signal can be constructed by the initial solution and channel state information. Then, final demodulation result is obtained by the line-of-sight component in the received signal which can be achieved by cancelling the other multipath signals in the received signal. The solution can be further used to construct the multipath signals allowing a multistage detector with higher performance to be realized. It is shown by Monte Carlo simulations in an SUI-5 channel that the new scheme offers dramatically higher performance than traditional equalization schemes.

Function speculation design with error recovery mechanisms is quite promising due to its high performance and low area overhead. Previous work has focused on two-stage function speculation and thus lacks a systematic way to address the challenge of the multistage function speculation approach. This paper proposes a multistage function speculation with adaptive predictors and applies it in a novel adder. We deduced the analytical performance and area models for the design and validated them in our experiments. Based on those models, a general methodology is presented to guide design optimization. Both analytical proofs and experimental results on the fabricated chips show that the proposed adder's delay and area have a logarithmic and linear relationship with its bit number, respectively. Compared with the DesignWare IP, the proposed adder provides the same performance with 6-17% area reduction under different bit lengths.

A space-time and multipath diversity combining algorithm is presented for STBC single carrier block transmission system with two transmit and one receive antennas. The initial solution is achieved by an STBC-based frequency domain equalizer, and the multipath components in the received signal are decoupled by this initial solution and channel state information. Finally, STBC combining is carried out on each decoupled multipath component separately, and then the single carrier output branches are combined further using the maximal ratio combining (MRC) algorithm.

Assistive technology (AT) is becoming increasingly important for improving the mobility and language learning capabilities of persons with disabilities, thus enabling them to function independently and to improve their social opportunities. The Morse code has been shown to be a valuable tool in assistive technology, augmentative and alternative communication, and rehabilitation for people with neuromuscular diseases such as amyotrophic lateral sclerosis, multiple sclerosis, and muscular dystrophy. In this paper, we designed and implemented a wireless environmental control aid system using the Morse code as an adapted access communication tool, which includes three types of switch: single-switch, double-switch, and six-switch types. People with disabilities can easily control all types of electronic appliance without restrictions owing to spatial arrangements using a signal transmission based on radio frequency (RF). Experimental results revealed that three participants with disabilities were able to gain access to electronic facilities after six weeks of practice with the new system.

Battery-powered wireless sensor networks are prone to premature failures because some nodes deplete their batteries more rapidly than others due to workload variations, the many-to-one traffic pattern, and heterogeneous hardware. Most previous sensor network lifetime enhancement techniques focused on balancing the power distribution, assuming the usage of the identical battery. This paper proposes a novel fine-grained cost-constrained lifetime-aware battery allocation solution for sensor networks with arbitrary topologies and heterogeneous power distributions. Based on an energy–cost battery pack model and optimal node partitioning algorithm, a rapid battery pack selection heuristic is developed and its deviation from optimality is quantified. Furthermore, we investigate the impacts of the power variations on the lifetime extension by battery allocation. We prove a theorem to show that power variations of nodes are more likely to reduce the lifetime than to increase it. Experimental results indicate that the proposed technique achieves network lifetime improvements ranging from 4–13 over the uniform battery allocation, with no more than 10 battery pack levels and 2-5 orders of magnitudes speedup compared with a standard integer nonlinear program solver (INLP).

Negative bias temperature instability (NBTI) has become a critical reliability phenomena in advanced CMOS technology. In this paper, we propose an analytical temperature-aware dynamic NBTI model, which can be used in two circuit operation cases: executing tasks with different temperatures, and switching between active and standby mode. A PMOS Vth degradation model and a digital circuits' temporal performance degradation estimation method are developed based on our NBTI model. The simulation results show that: 1) the execution of a low temperature task can decrease ΔVth due to NBTI by 24.5%; 2) switching to standby mode can decrease ΔVth by 52.3%; 3) for ISCAS85 benchmark circuits, the delay degradation can decrease significantly if the circuit execute low temperature task or switch to standby mode; 4) we have also observed the execution time's ratio of different tasks and the ratio of active to standby time both have a considerable impact on NBTI effect.

The research reported in this paper is an attempt to elucidate the predictors of pause duration in read-aloud discourse. Through simple linear regression analysis and stepwise multiple linear regression, we examined how different factors (namely, syntactic structure, discourse hierarchy, topic structure, preboundary length, and postboundary length) influenced pause duration both separately and jointly. Results from simple regression analysis showed that discourse hierarchy, syntactic structure, topic structure, and postboundary length had significant impacts on boundary pause duration. However, when these factors were tested in a stepwise regression analysis, only discourse hierarchy, syntactic structure, and postboundary length were found to have significant impacts on boundary pause duration. The regression model that best predicted boundary pause duration in discourse context was the one that first included syntactic structure, and then included discourse hierarchy and postboundary length. This model could account for about 80% of the variance of pause duration. Tests of mediation models showed that the effects of topic structure and discourse hierarchy were significantly mediated by syntactic structure, which was most closely correlated with pause duration. These results support an integrated model combining the influence of several factors and can be applied to text-to-speech systems.

Due to the superlinear dependence of leakage power consumption on temperature, and spatial variations in on-chip thermal profiles, methods of leakage power estimation that are known to be accurate require detailed knowledge of thermal profiles. Leakage power depends on the integrated circuit (IC) thermal profile and circuit design style. Here, we show that piecewise linear models can be used to permit accurate leakage estimation over the operating temperature ranges of the ICs. We then show that for typical IC packages and cooling structures, a given amount of heat introduced at any position in the active layer will have a similar impact on the average temperature of the layer. These two observations support the proof that, for wide ranges of design styles and operating temperatures, extremely fast, coarse-grained thermal models, combined with piecewise linear leakage power consumption models, enable the estimation of chip-wide leakage power consumption. These results are further confirmed through comparisons with leakage estimates based on detailed, time-consuming thermal analysis techniques. Experimental results indicate that, when compared with a leakage analysis technique that relies on accurate spatial temperature estimation, the proposed technique yields a 59,259 to 1,790,000 speedup in estimating leakage power consumption, while maintaining accuracy.

This paper describes a fast and effective algorithm for refining the parameter estimates of multicomponent third-order polynomial phase signals (PPSs). The efficiency of the proposed algorithm is accompanied by lower signal-to-noise ratio (SNR) threshold, and computational complexity. A two-step procedure is used to estimate the parameters of multicomponent third-order PPSs. In the first step, an initial estimate for the phase parameters can be obtained by using fast Fourier transformation (FFT), k-means algorithm and three time positions. In the second step, these initial estimates are refined by a simple moving average filter and singular value decomposition (SVD). The SNR threshold of the proposed algorithm is lower than those of the non-linear least square (NLS) method and the estimation refinement method even though it uses a simple moving average filter. In addition, the proposed method is characterized by significantly lower complexity than computationally intensive NLS methods. Simulations confirm the effectiveness of the proposed method.

This paper proposed a novel platform for sensor nodes to resolve the energy and latency challenges. It consists of a processor, an adaptive compressing module and several compression accelerators. We completed the proposed chip in a 0.18µm HJTC CMOS technology. Compared to the software-based solution, the hardware-assisted compression reduces over 98% energy and 212% latency. Besides, we balanced the energy and latency metric using an adaptive module. According to the scheduling algorithm, the module tunes the state of the compression accelerator, as well as the sampling frequency of the online sensor. For example, given a 9µs constraint for a 1-byte operation, it reduces 34% latency while the energy overheads are less than 5%.

RSPICE, a fast timing simulator for large digital MOS circuits, is presented in this paper. A new table-based region-wise linear MOS transistor model and the analytical solution of the generic sub-circuit primitive are applied to calculate the transient response of digital MOS circuits. The body effect of pass transistors is included in the MOS model and the floating capacitor network can be handled by this sub-circuit primitive as well. In RSPICE, MOS transistors with a DC path are grouped into a DC-connected block (DCCB), and DCCBs with a feedback path are combined as a strongly connected component (SCC). RSPICE orders SCCs by Tarjan's algorithm and simulates ordered SCCs one by one. DCCBs are basic cells in RSPICE and any DCCB can be mapped into one or more sub-circuit primitives. In order to calculate the transient response of these primitives analytically, RSPICE approximates the input signals of the primitive by piecewise linear functions. To compromise the simulation accuracy and run time, partial waveform and partial time convergent (PWPTC) combined with dynamic windowing technique is applied to simulate SCCs. Other key issues of RSPICE, such as circuit partition, pass-transistor and floating-capacitor processing, simulation-flow control and waveform modification are also discussed in detail. Compared with HSPICE , the simulation result of RSPICE is very accurate with an error less than 3%, but the speed is 1-2 orders over HSPICE.

To improve the robustness and transparency of spread spectrum (SS) based watermarking, this paper presents a new informed embedding strategy, which we call selective host-interference cancellation. We show that part of the host-interference in SS-based watermarking is beneficial to blind watermark extraction or detection, and can be utilized rather than removed. Utilizing this positive effect of the host itself can improve the watermark robustness without significantly sacrificing the media fidelity. The proposed strategy is realized by selectively applying improved SS (ISS) modulation to traditional SS watermarking. Theoretically, the error probability of the new method under additive white Gaussian noise attacks is several orders of magnitude lower than that of ISS for high signal-to-watermark ratios, and the required minimum watermark power is reduced by 3dB. Experiments were conducted on real audio signals, and the results show that our scheme is robust against most of common attacks even in high-transparency or high-payload applications.

Time synchronization is an essential service for wireless sensor networks (WSNs). However, fixed-period time synchronization can not serve multiple users efficiently in terms of energy consumption. This paper proposes a lightweight precision-adaptive protocol for cluster-based multi-user networks. It consists of a basic average time synchronization algorithm and an adaptive control loop. The basic average time synchronization algorithm achieves 1 µs instantaneous synchronization error performance. It also prolongs re-synchronization period by taking the average of two specified nodes' local time to be cluster global time. The adaptive control loop realizes diverse levels of synchronization precision based on the proportional relationship between sync error and re-synchronization period. Experimental results show that the proposed precision-adaptive protocol can respond to the sync error bound change within 2 steps. It is faster than the exponential convergence of the adaptive protocols based on multiplicative iterations.

A low-power low-noise intermediate-frequency (IF) circuit is proposed for Gaussian frequency shift keying (GFSK) low-IF receivers. The proposed IF circuit is realized by an all-analog architecture composed of a couple of limiting amplifiers (LAs) and received signal strength indicators (RSSIs), a couple of band-pass filters (BPFs), a frequency detector (FD), a low-pass filter (LPF) and a slicer. The LA and RSSI are realized by an optimized combination of folded amplifiers and current subtractor based rectifiers to avoid the process induced depressing on accuracy. In addition, taking into account the nonlinearity and static current of rectifiers, we propose an analytical model as an accurate approximation of RSSIs' transfer character. An active-RC based GFSK demodulation scheme is proposed, and then both low power consumption and a large dynamic range are obtained. The chip is implemented with HJTC 0.18 µm CMOS technology and measured under an intermediate frequency of 200 kHz, a data rate of 100 kb/s and a modulation index of 1. The RSSI has a dynamic range of 51 dB with a logarithmic linearity error of less than 1 dB, and the slope is 23.9 mV/dB. For 0.1% bit error ratio (BER), the proposed IF circuit has the minimum input signal-to-noise ratio (SNR) of 5 dB and an input dynamic range of 55.4 dB, whereas it can tolerate a frequency offset of -3%+9.5% at 6 dB input SNR. The total power consumption is 5.655.89 mW.

This paper introduces balanced switching schemes to compensate linear and quadratic gradient errors, in the unary current source array of a current-steering digital-to-analog converter (DAC). A novel algorithm is proposed to avoid the accumulation of gradient errors, yielding much less integral nonlinearities (INLs) than conventional switching schemes. Switching scheme examples with different number of current cells are also exhibited in this paper, including symmetric arrays and non-symmetric arrays in round and square outlines. (a) For symmetric arrays where each cell is divided into two parallel concentric ones, the simulated INL of the proposed round/square switching scheme is less than 25%/40% of conventional switching schemes, respectively. Such improvement is achieved by the cancelation of linear errors and the reduction of accumulated quadratic errors to near the absolute lower bound, using the proposed balanced algorithm. (b) For non-symmetric arrays, i.e. arrays where cells are not divided into parallel ones, linear errors cannot be canceled, and the accumulated INL varies with different quadratic error distribution centers. In this case, the proposed algorithm strictly controls the accumulation of quadratic gradient errors, and different from the algorithm in symmetric arrays, linear errors are also strictly controlled in two orthogonal directions simultaneously. Therefore, the INLs of the proposed non-symmetric switching schemes are less than 64% of conventional switching schemes.

For physically disabled persons, the conventional computer keyboard is insufficient as a useable communication device. In this paper, Morse code is selected as a communication adaptive device for persons with impaired hand coordination and dexterity. Morse code is composed of a series of dots, dashes, and space intervals. Each element is transmitted by sending a signal for a defined length of time. Maintaining a stable typing rate by the disabled is difficult. To solve this problem, a suitable adaptive automatic recognition method, which combines a variable degree variable step size LMS algorithm with a learning vector quantization method, was applied to this problem in the present study. The method presented here is divided into five stages: space recognition, tone recognition, learning process, adaptive processing, and character recognition. Statistical analyses demonstrated that the proposed method elicited a better recognition rate in comparison to alternative methods in the literature.

In this paper, Morse code is selected as a communication adaptive device for persons whose hand coordination and dexterity are impaired by such ailments as amyotrophic lateral sclerosis, multiple sclerosis, muscular dystrophy, and other severe handicaps. Morse code is composed of a series of dots, dashes, and space intervals, and each element is transmitted by sending a signal for a defined length of time. A suitable adaptive automatic recognition method is needed for persons with disabilities due to their difficulty in maintaining a stable typing rate. To overcome this problem, the proposed method combines the support vector machines method with a variable degree variable step size LMS algorithm. The method is divided into five stages: tone recognition, space recognition, training process, adaptive processing, and character recognition. Statistical analyses demonstrated that the proposed method elicited a better recognition rate in comparison to alternative methods from the literature.