A new method is proposed for determining the parasitic extrinsic resistances of MESFETs and HEMTs from the measured S-parameters under active bias. The proposed method is based on the fact that the difference between drain resistance (Rd) and source resistance (Rs) can be found from the measured S-parameters under zero bias condition. It is possible to define the new internal device including intrinsic device and three extrinsic resistances by eliminating the parasitic imaginary terms. Three resistances can be calculated easily via the presented explicit three equations, which are induced from the fact that 1) the real parts of Yint,11 and Yint,12 of intrinsic Y-parameters are very small or almost zero, 2) the transformation relations between S-, Z-, and Y-matrices. The modelled S-parameters calculated by the obtained resistances and all the other equivalent circuit parameters are in good agreement with the measured S-parameters up to 40 GHz.

In this Letter, a dumbbell-shaped patch loaded slotline(PLS) is proposed. Like the conventional defected ground structure(DGS) for a microstrip line, we show that the proposed PLS can provide a wide bandstop characteristic in some frequency bands with only one or small number of unit cells. Also, the equivalent circuit model for a unit section is derived from the analysis of the field distributions in the structure and its circuit parameters are determined by means of full wave numerical simulations. This equivalent circuit is shown to be dual to that of the typical DGS in a microstrip line. A broadband microstrip to slotline transition is incorporated in the PLS in order to measure the characteristics of the structure. The experimental results agree well with the simulations and show the validity of the modeling for the proposed PLS.

This paper describes the performance improvement of power amplifiers by defected ground structure (DGS). Due to the excellent capability of harmonic rejection and tuning, DGS plays a great role in improving the major nonlinear behaviors of power amplifier such as output power, harmonics, power added efficiency (PAE), and the ratio between the carrier and the third order intermodulation distortion (C/IMD3). In order to verify the improvement of performances by DGS, measured data for a power amplifier, which adopts a 30 Watts LDMOS device for the operation at 2.1-2.2 GHz, are illustrated under several operating bias currents for two cases, i.e., with and without DGS attached. The principle of the improvement is described by the simple Volterra nonlinear transfer functions with the consideration of different operating classes. The obtained improvement of the 30 Watts power amplifier, under 400 mA of IdsQ as an example, includes the reduction in the second and third harmonics by 17 dB and 20 dB, and the increase in output power, PAE, and C/IMD3 by 1.3 Watts, 3.4%, and 4.7 dB, respectively.