Thin (Ba0.75Sr0.25)TiO3 (BST) films to be used as dielectric materials in 256 Mbit DRAM capacitors were investigated. These films were deposited by an rf-sputtering method at substrate temperatures of 480 to 750. As substrate temperature increases, the dielectric constant to the films also increases, from 230 to 550. BST films prepared at temperatures higher than 700 show larger current leaks than films prepared at lower temperatures. A dielectric constant of 250, corresponding to a silicon oxide equivalent thickness (teq) of 0.47 nm, and a leak current density about 110-8 A/cm2 were obtained in 30-nm-thick film deposited at 660. Both of these values are sufficient for use in a 256 Mbit DRAM capacitor.

A 100 W, low distortion AlGaAs/GaAs heterostructure FET has been developed for CDMA cellular base stations. This FET employs the longest gate finger ever reported of 800 µm to shrink the chip size. The size of the chip and the package are miniaturized to 1.242.6 mm2 and 17.4 24.0 mm2, respectively. The developed FET exhibits 100 W (50 dBm) saturation output power, and 11.5 dB power gain at 1 dB gain compression at 2.1 GHz. The third-order intermodulation distortion and the power-added efficiency under the two-tone test condition (Δf=1 MHz) are -35 dBc and 24%, respectively at 42 dBm output power, that is 8 dB back off from the saturation power.

A new harmonic termination that controls the waveform of the drain current to be rectangular is developed for high-efficiency power amplifier modules. Its harmonic termination is a short circuit at the third harmonic and a non-short circuit at the second harmonic. It is found experimentally and confirmed by simulation that the load-matching condition at the third-order harmonic improves the efficiency of a transistor by more than 13%. By using this tuning, 57.7% power-added efficiency of the module is achieved at the output power of 29.9 dBm with ACP of -50 dBc, NACP of -65 dBc at 925 MHz and Vdd of 3.5 V.